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BSc IT Sem I 2018 19 2018-19 DIGITAL ELECTRONICS Question Paper - Mumbai University | munotes

DIGITAL ELECTRONICS.pdf
SEM I · 2018-19 · 1 May 2025

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Older exam 2018-19 - DISCRETE MATHEMATICS Semester-end · 2018 19
Newer exam None yet: this is the latest New papers land after each exam season.

Questions asked in this paper

  1. Q1 Attempt any three of the following: 15 marks
    • a. Convert the following
    • b. What is Hamming code? A seven bit even parity hamming code is received as 1110101 What is the correct code?
    • c. Certain number system has base 7. What is the hexadecimal equivalent of the minimum and maximum number that is expressed using the base 7 and four bits?
    • d. Solve the following
    • (ii) (1010101)2 + (11)2
    • e. Perform the following
    • f. Solve the following
    • (i) Convert the following number to BCD and add them (11)10 +
    • (ii) Convert the following number to XS-3 and subtract them (53)10 — (28)10
  2. Q2 Attempt any three of the following: 15 marks
    • a. Reduce the following using Boolean laws and theorems
    • (ii) XY + + Z)
    • b. Write short notes on input bubbled AND gate and input bubbled OR gate
    • c. Prove the following
    • d. Simplify using K-map and realize it using minimum number of gates
    • e. Simplify using K-map and realize it using minimum number of gates
  3. Q3 Attempt any three of the following: 15 marks
    • a. The input to a combinational logic circuit is a binary number. Design the logic circuit with minimum hardware for the following
    • (i) Output = 1 if the input binary number is 5 or less than 5 (i1) Output Y2 if the input binary number is 9 or more than 9
    • b. Convert 4 bit gray to 4 bit binary. Draw the truth table, necessary k-maps and logic
    • c. Draw circuit and explain working of XS-3 adder
    • d. Design the Full Subtractor using K-map. Draw the circuit diagram for the same
    • e. How Booths algorithm speeds up the multiplication process? Explain with an example
    • f. Design single bit magnitude comparator. Draw truth table, K-map and circuit diagram for the same
  4. Q4 Attempt any three of the following: 15 marks
    • d. Draw logic circuit diagram of D flip flop and describe with a truth table the working of
    • e. How SR flip-flop can be used to work as T flip-flop? Explain
    • f. How flip-flop is used in eliminating keyboard debouncing? Explain
  5. Q5 Attempt any three of the following: 15 marks
    • b. Design 4 bit binary up/down counter with control input of up/down
    • c. Implement synchronous counter using JK FF for state diagram shown in figure
    • d. Write a short note on buffer register
    • e. Explain working of SIPO register
    • f. Write a short note on Johnson counter

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