Information Technology Engineering Sem 4 Computer Organization and Architecture Question Paper PDF 2026 - Mumbai University | munotes
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Questions asked in this paper
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Q3 If the program has a total 1000 and CPU has 10 average CPI with speed of 2GHz. Find the execution time of a program Assuming AL=00H, which flag will be set when ALU performs SUB AL, 22H? The first machine cycle of an instruction is always a In Instruction Pipelining Structural Hazard means Option A: | Any condition in which either the source or the destination operands of an instruction are not available at the time expected in the pipeline A delay in the availability of an instruction causes the pipeline to stall Option C: _| The situation when two instructions require the use of a given hardware resource at the same time When a data gets overwritten by branching
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Q7 In the case of Non Restoring Division Algorithm, when (18)10 is divided by (10)10, then what is stored in the registers Q & A respectively ? Address of the instruction The data of instruction In memory Hierarchy which is the fastest memory DMA is used when I/O device is faster than the microprocessor I/O device is slower than the microprocessor I/O device and microprocessor are of same speed when speed is not the criteria for selection Please use either of the 3 option given below while setting up the subjective/descriptive questions
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Q2 Solve any Four out of Six 5 marks each Explain following instructions of 8086 Microprocessor with one example Describe. Flynn’s classification of parallel computing in detail Perform 7 + 2.using the Restoring Division Algorithm List and explain in detail the characteristics /parameters of memory Why I/O modules are required in microprocessor systems
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Q3 Solve any Four out of Six 5 marks each Explain SR and JK flip flop Write an assembly language program to add two 16 bit BCD numbers and store the result C Give the organization of the Hardwired control Unit and explain the function performed by various blocks Explain following assembler directives of 8086 Microprocessor Explain associative cache mapping technique What is meant by programmed controlled I/O
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Q4 Solve any Four out of Six 5 marks each Convert 25 decimal to binary Identify the addressing modes of the following instructions 1.MOV CX, 2200H 2.MOV AX,[1000H] Explain the concept of nano programming Explain Amdahl’s Law Consider a direct mapped cache with block size 4 KB. The size of the main memory is 16 GB and there are 10 bits in the tag. Find
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Q1 Number of bits in physical address
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Q2 Number of bits in block offset
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Q3 Number of bits in line number
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Information Technology Engineering Sem 4 Paper Path
Use this paper as one timed INFT mock, then compare Operating System, Automata Theory, Engineering Mathematics IV, and Computer Organization papers from nearby Mumbai University year sets.
Step: Open this Information Technology Engineering paper in the free viewer first.
Step: Compare the year set and nearby INFT subjects for repeated paper patterns.
Step: Use notes only for topics where marks were missed during practice.
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