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Engineering BE Electronics and Telecommunication Sem 5 May 2019 2019 Microlectronics Question Paper - Mumbai University | munotes

May 2019 Question Paper.pdf
EXTC · 1 May 2025

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Questions asked in this paper

  • (3) Figures to the right indicate full marks
  • (4) Assume suitable data if necessary and mention the same.in answer sheet
  1. Q1 Attempt any four 20 marks
    • a) Compare constant voltage scaling and full
    • b) Compare single ended and differential power amplifiers
    • c) Why folded cascode is very popular building block in CMOS. amplifier? Explain its
    • d) Derive output resistance of MOS current source
    • e) What are the advantages of active load?
  2. Q2 a) Design an NMOS current source to provide a bias current of Jg = 100 and an output resistance greater than 20 MQ. The reference current is to be = 150 The circuit is to be biased at + and the voltage at the drain of the current source transistor is to be no smaller than —2.2 V. The minimum width to length ratio of transistor is to be unity. (12)
    • b) Explain cascade current mirror in detail. 8
  3. Q3 a) For CS amplifier with current source load find intrinsic gain A, and explain the effect of output resistance on gain. (10)
    • b) For CS stage with resistive load amplifier prove that Gain = 6
    • c) Compare double cascade with folded cascade. 4
  4. Q4 a) Explain PMOS fabrication process with suitable diagrams. 10 marks
    • b) Explain with proper diagram CLASS F power amplifier. 10
  5. Q5 a) Explain in detail fabrication of transformer. 10 marks
    • b) Explain short channel effects in MOSFET. 10
  6. Q6 a) Explain DC transfer characteristics of MOS differential amplifier. 10 marks
    • b) Calculate the DC characteristics of MOSFET differential amplifier shown in Fig. 6(b) the transistor parameters are = = 0.1 =) = = 0.3 and for all transistor A= OandV,, = 1V. Determine the maximum range of common—mode input voltage. (10)

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