Engineering BE Electronics and Computer Science Sem 3 May 2019 2019 Digital Circuits And Design Question Paper - Mumbai University | munotes
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Questions asked in this paper
- Please check whether you have got the right question paper
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Q2 Attempt any three out of the remaining five questions
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Q1 Attempt (any 4)
- A. Implement EX-OR gate using only NAND gates. 05
- B. Explain FAN in, FAN out, power dissipation and noise immunity with reference to 05
- C. Explain glitch problem of ripple counter. 05
- D. Write a note on VHDL Framework. 05
- E. Draw the truth table and logic diagram of Full Subtractor
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Q2 A_ Draw a circuit diagram of two input TIL NAND gate and explain its operation. B_ Design 4 bit Johnson counter using J-K Flip Flop. Explain it operation using waveform. 10 10 marks
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Q3 A_ Design a circuit with optimum utilization of PLA to implement the following functions. Eliminate redundant states and draw reduced state diagram. 10 Implement the function using single IC some gates. 10 Paper Subject Code: 49703 DIGITAL CIRCUITS AND DESIGN 10 marks
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Q5 A Analyze the sequential state machine shown in figure. Obtain state diagram for the same
- B) Design a mod-16 up counter using IC 74163, draw the circuit diagram and explain its 10 Write notes on. 20
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Q1 Stuck at '0' and Stuck at faults
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Q4 Mealy and Moore Sequential Machine
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