Digital System and Architecture Notes | B.Sc. (Computer Science) Semester 1 | Mumbai University | munotes

Contents

Module I Fundamentals of digital logic, combinational and sequential circuits, and the computer system

1. How a Computer Represents Numbers: Bits, Bytes and Number Systems 1
2. Converting Between Number Systems 9
3. Binary Arithmetic 15
4. Signed Numbers and Complements 21
5. Codes: BCD, Excess-3, Gray Code, ASCII and Parity 28
6. Boolean Algebra: What It Is and Where It Came From 34
7. The Laws and Theorems of Boolean Algebra 41
8. Logic Gates 50
9. Universal Gates: Building Every Gate from NAND or NOR 56
10. Canonical Forms: Minterms, Maxterms, SOP and POS 61
11. Algebraic Simplification of Logic Circuits 66
12. Karnaugh Maps: Two, Three and Four Variables 71
13. Karnaugh Maps with Don't-Care Conditions, and POS Simplification 77
14. Combinational Circuits, and How One Is Designed 82
15. The Half Adder and the Full Adder 87
16. The Parallel Binary Adder 91
17. The Half Subtractor and the Full Subtractor 95
18. Subtraction with an Adder: the 2's Complement Adder-Subtractor 99
19. The Magnitude Comparator 103
20. The Multiplexer 106
21. Implementing Boolean Functions with a Multiplexer 110
22. The Demultiplexer and the Decoder 114
23. Implementing Boolean Functions with a Demultiplexer 117
24. Sequential Circuits: Memory and the Clock 120
25. The SR Latch and the SR Flip-Flop 124
26. The JK Flip-Flop, the Race-Around Condition and the Master-Slave JK 128
27. The D Flip-Flop 132
28. Triggering, Characteristic Tables and Excitation Tables 135
29. Asynchronous (Ripple) Counters 139
30. Synchronous Counters, and How to Design One 142
31. Shift Registers 146
32. Computer Organization and Computer Architecture 149
33. The Components of a Computer and What Each Does 152
34. How a Computer Works at the Top Level: Fetch, Execute and Interrupts 156
35. Interconnection Structures 159
36. Bus Interconnection 162
37. Multiple-Bus Hierarchies and the Elements of Bus Design 165
38. The I/O Module 169
39. Programmed I/O 172
40. Interrupt-Driven I/O 175
41. Direct Memory Access 178

Module II Memory system organization, instructions and processor organization (8085 and 8086)

1. Memory: How It Is Classified and What Describes It 181
2. The Memory Hierarchy and Locality of Reference 185
3. Semiconductor Main Memory: RAM and the ROM Family 189
4. SRAM and DRAM 193
5. Interleaved Memory 197
6. Associative Memory 201
7. Cache Memory: The Principle and the Elements of Cache Design 205
8. Cache Mapping: Direct, Associative and Set-Associative 209
9. Replacement Algorithms 213
10. Write Policies 218
11. Cache Performance 222
12. Cache Coherence 226
13. Virtual Memory: Paging, Page Tables and the TLB 230
14. Segmentation 235
15. Magnetic Disks 239
16. Optical Memory 243
17. Flash Memory and the Solid-State Drive 248
18. RAID Levels 252
19. Machine Instructions and Their Elements 257
20. Instruction Formats: Three, Two, One and Zero Addresses 260
21. Instruction Sets: Types of Operands 264
22. Instruction Sets: Types of Operations 268
23. Addressing Modes 272
24. Meet the 8085 and the 8086 276
25. Addressing Modes on the 8085, with Assembly Examples 279
26. Addressing Modes on the 8086, with Assembly Examples 283
27. Processor Organization: Structure and Function 288
28. The Control Unit: Hardwired and Microprogrammed 291
29. Register Organization 295
30. The 8085's Registers and Flags 299
31. The 8086's Registers 303
32. Data Transfer Operations 307
33. Arithmetic Operations 311
34. Logical Operations 315
35. 8085 Programs: Putting the Groups Together 319
36. The Instruction Cycle 324
37. Instruction Pipelining 327
38. Pipeline Hazards and Branches 330
39. RISC and CISC Architecture 334
40. Instruction-Level Parallelism and Superscalar Processors 338
41. Superscalar Design Issues 342