Digital System and Architecture Notes | B.Sc. (Computer Science) Semester 1 | Mumbai University | munotes

Contents

Module I Fundamentals of digital logic, combinational and sequential circuits, and the computer system

1. How a Computer Represents Numbers: Bits, Bytes and Number Systems 1
2. Converting Between Number Systems 9
3. Binary Arithmetic 15
4. Signed Numbers and Complements 21
5. Codes: BCD, Excess-3, Gray Code, ASCII and Parity 28
6. Boolean Algebra: What It Is and Where It Came From 34
7. The Laws and Theorems of Boolean Algebra 41
8. Logic Gates 50
9. Universal Gates: Building Every Gate from NAND or NOR 56
10. Canonical Forms: Minterms, Maxterms, SOP and POS 61
11. Algebraic Simplification of Logic Circuits 66
12. Karnaugh Maps: Two, Three and Four Variables 71
13. Karnaugh Maps with Don't-Care Conditions, and POS Simplification 76
14. Combinational Circuits, and How One Is Designed 81
15. The Half Adder and the Full Adder 86
16. The Parallel Binary Adder 90
17. The Half Subtractor and the Full Subtractor 93
18. Subtraction with an Adder: the 2's Complement Adder-Subtractor 97
19. The Magnitude Comparator 101
20. The Multiplexer 104
21. Implementing Boolean Functions with a Multiplexer 107
22. The Demultiplexer and the Decoder 111
23. Implementing Boolean Functions with a Demultiplexer 114
24. Sequential Circuits: Memory and the Clock 117
25. The SR Latch and the SR Flip-Flop 121
26. The JK Flip-Flop, the Race-Around Condition and the Master-Slave JK 125
27. The D Flip-Flop 129
28. Triggering, Characteristic Tables and Excitation Tables 132
29. Asynchronous (Ripple) Counters 136
30. Synchronous Counters, and How to Design One 139
31. Shift Registers 143
32. Computer Organization and Computer Architecture 146
33. The Components of a Computer and What Each Does 149
34. How a Computer Works at the Top Level: Fetch, Execute and Interrupts 153
35. Interconnection Structures 156
36. Bus Interconnection 159
37. Multiple-Bus Hierarchies and the Elements of Bus Design 162
38. The I/O Module 166
39. Programmed I/O 169
40. Interrupt-Driven I/O 172
41. Direct Memory Access 175

Module II Memory system organization, instructions and processor organization (8085 and 8086)

1. Memory: How It Is Classified and What Describes It 178
2. The Memory Hierarchy and Locality of Reference 182
3. Semiconductor Main Memory: RAM and the ROM Family 186
4. SRAM and DRAM 190
5. Interleaved Memory 194
6. Associative Memory 197
7. Cache Memory: The Principle and the Elements of Cache Design 201
8. Cache Mapping: Direct, Associative and Set-Associative 205
9. Replacement Algorithms 209
10. Write Policies 214
11. Cache Performance 218
12. Cache Coherence 222
13. Virtual Memory: Paging, Page Tables and the TLB 226
14. Segmentation 231
15. Magnetic Disks 235
16. Optical Memory 239
17. Flash Memory and the Solid-State Drive 244
18. RAID Levels 248
19. Machine Instructions and Their Elements 253
20. Instruction Formats: Three, Two, One and Zero Addresses 256
21. Instruction Sets: Types of Operands 260
22. Instruction Sets: Types of Operations 263
23. Addressing Modes 267
24. Meet the 8085 and the 8086 271
25. Addressing Modes on the 8085, with Assembly Examples 274
26. Addressing Modes on the 8086, with Assembly Examples 277
27. Processor Organization: Structure and Function 282
28. The Control Unit: Hardwired and Microprogrammed 285
29. Register Organization 289
30. The 8085's Registers and Flags 293
31. The 8086's Registers 297
32. Data Transfer Operations 301
33. Arithmetic Operations 305
34. Logical Operations 309
35. 8085 Programs: Putting the Groups Together 313
36. The Instruction Cycle 318
37. Instruction Pipelining 321
38. Pipeline Hazards and Branches 324
39. RISC and CISC Architecture 328
40. Instruction-Level Parallelism and Superscalar Processors 332
41. Superscalar Design Issues 336