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BSc CS Sem 1 BSc CS Semester 1 (2018 2019) 2019 Computer Organization Design Question Paper - Mumbai University | munotes

BSc CS Semester 1 (2018 2019) Question Paper, 2018.pdf
SEM 1 · BSc CS Semester 1 (2018-2019) · 266 KB · 1 May 2025

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Questions asked in this paper

  • 2) Figures to the right indicate marks
  1. Q3 Illustrations, in-depth answers and diagrams will be appreciated
  2. Q4 Mixing of sub-questions is not allowed
  3. Q1 Attempt All Questions. (Each of 5 marks) (15M)
    • (a) Multiple Choice Questions (5M)
    • (i) ANSI stands for
    • (ii) The decoded instruction is stored in
    • (iii) is used to store data in registers
    • a) D flip flop b) JK flip flop c) RS flip flop d) none of these
    • (iv) The addressing mode/s, which uses the PC instead of a general purpose
    • a) Indexed with b) Relative
    • (v) The instruction, Add #45,R1 does
    • a) Adds the value of 45 to the address of R1 and stores 45 in that address
    • b) Adds 45 to the value of R1 and stores it in R1
    • c) Finds the memory location 45 and adds that content to that of R1
    • d) None of the above
    • (b) ‘Fill in the blanks (5M)
    • i) Flip-flop is a basic element of circuits
    • ii) The usual BUS structure used to connect the I/O devices is The minimum number of selection inputs required for selecting on out of
    • iv) Race condition may exist in sequential circuits
    • v) When 1101 is used to divide 100010010 the remainder is
    • (c) Short Answers (5M)
    • (i) What are uses of interrupts?
    • (ii) Design NOR gate using AND, OR and NOT gates
    • (iii) SOP and POS terms
    • (iv) How instructions of typical microprocessors are classified?
    • (v) What are shift registers? Attempt the following (Any of 5Marks) (15M)
    • (a) With help of neat diagram explain basic functional units of a computer
    • (b) the memory and the processor can be connected? Explain with diagram
    • (c) Perform with 2’s complement arithmetic: -34+17
    • (d) and explain in brief main features of fourth generation computers
    • (f) List the steps needed to execute the machine instruction Load R2, LOC
  4. Q3 Attempt the following (Any THREE) (Each of 5Marks) (15M)
    • (a) | Compare RISC and CISC Instruction Sets
    • (b) are addressing modes? Why different addressing modes are required? Explain different RISC-type addressing modes
    • (c) Explain Big-Endian and Little-Endian Assignments
    • (d) A typical computer must support instructions capable of performing four types of operations. List and explain these operations with at least one instruction
    • (e) Consider instruction + [B] With neat figure show a possible program segment for this task as it appears in the memory of a computer
    • (f) | What is an assembler? What is object program?
  5. Q4 Attempt the following (Any THREE) (Each of 5Marks) (15M)
    • (a) and explain with neat diagram main hardware components of a processor
    • (b) the RISC style Load instruction Load R2, X(R7) Examine the actions involved in fetching and executing the above instruction
    • (c) Explain with neat diagram conceptual view of the hardware needed for
    • (d) 5-stage organization with neat figure. What is the Data path?
    • (e) Explain with example Sequence of actions needed to fetch and execute an
    • (f) | How the processor generates the control signals that cause these actions to take place in the correct sequence and at the right time?
  6. Q5 Attempt the following (Any THREE) (Each of 5Marks) (15M)
    • (a) Convert the following pairs of decimal numbers 2’s-complement numbers, and then perform addition and subtraction on each pair. Indicate whether or not overflow occurs for each case
    • (a) 7 and 13 (b) -12 and 9
    • (b) Write a RISC-style program for computing the dot product of two vectors
    • (c) the logic expressions for a circuit that compares two unsigned numbers: X= and Y = and generates three outputs: XGY, XEY, and XLY. One of these outputs is set to 1 to indicate that X is greater than, equal to, or less than
    • (e) is a multiplexer? What is their need? Design 4:1 multiplexer

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