TE Electronics Engg1_1 Syllabus Mumbai University

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AC- 29/06/2021
Item No. – 6.13

UNIVERSITY OF MUMBAI




Bachelor of Engineering
in

Electronics Engineering

Second Year with Effect from AY2020 -21
Third Year with Effect from AY2021 -22
Final Year with Effect from AY 2022 -23


(REV -2019‘C’ Scheme) from Academic Year2019 –20

Under

FACULTY OF SCIENCE & TECHNOLOGY

(As per AICTE guidelines with effect from the academic year 2019 –2020)

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Date: 29.06.2021 Signature:


Dr. S. K. Ukarande
Associate Dean
Faculty of Science and Technology
University of Mumbai Dr. Anuradha Muzumdar
Dean
Faculty of Science and Technology
University of Mumbai
Sr. No. Heading Particulars
1 Title of the
Course Third Year BE in Electronics Engineering
2 Eligibility for Admission Second Year Engineering passed in line with the
Ordinance 0.6243
3 Passing Marks 40%
4 Ordinances / Regulations
( if any) Ordinance 0.624 3
5 No. of Years / Semesters 8 Semesters
6 Level Certificate/Diploma /UG/ PG
( Strike out which is not applicable)
7 Pattern Semester /Yearly
( Strike out which is not applicable)
8 Status Revised /New
( Strike out which is not applicable)
9 To be implemented from
Academic Year With effect from Academic Year: 202 1-2022 AC – 29/06/2021
Item No. – 6.13
UNIVERSITY OF MUMBAI

Syllabus for Approval

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 1

Preamble

To meet the challenge of ensuring excellence in engineering education, the issue of quality needs to be
addressed, debated and taken forward in a systematic manner. Accreditation is the principal means of
quality assurance in higher education. The major emphasis of accreditation process is to measure the
outcomes of the program that is being accredited. In l ine with this Faculty of Science and Technology
(in particular Engineering)of University of Mumbai has taken a lead in incorporating philosophy of
outcome based education in the process of curriculum development.

Faculty resolved that course objectives and course outcomes are to be clearly defined for each course,
so that all faculty members in affiliated institutes understand the depth and approach of course to be
taught, which will enhance learner’s learning process. Choice based Credit and grading sys tem enables
a much -required shift in focus from teacher -centric to learner -centric education since the workload
estimated is based on the investment of time in learning and not in teaching. It also focuses on
continuous evaluation which will enhance the qu ality of education. Credit assignment for courses is
based on 15 weeks teaching learning process, however content of courses is to be taught in 12 -13 weeks
and remaining 2 -3 weeks to be utilized for revision, guest lectures, coverage of content beyond syll abus
etc. There was a concern that the earlier revised curriculum more focused on providing information and
knowledge across various domains of the said program, which led to heavily loading of students in
terms of direct contact hours. In this regard, fac ulty of science and technology resolved that to minimize
the burden of contact hours, total credits of entire program will be of 170, wherein focus is not only on
providing knowledge but also on building skills, attitude and self-learning . Therefore in the present
curriculum skill based laboratories and mini projects are made mandatory across all disciplines of
engineering in second and third year of programs, which will definitely facilitate self-learning of
students. The overall credits and approach of cu rriculum proposed in the present revision is in line with
AICTE model curriculum.

The present curriculum will be implemented for Second Year of Engineering from the academic year
2020 -21. Subsequently this will be carried forward for Third Year and Final Year Engineering in the
academic years 2021 -22, 2022 -23, respectively.

Dr. S. K. Ukarande Dr Anuradha Muzumdar
Associate Dean Dean
Faculty of Science and Technology Faculty of Science and Technology
University of Mumbai University of Mu mbai

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 2
Incorporation and implementation of Online
Contents from NPTEL/ Swayam Platform


The curriculum revision is mainly focused on knowledge component, skill based activities and
project based activities. Self -learning opportunities are provided to learners. In the revision
process this time in particular Revised syllabus of ‘C ‘ scheme wherever possible additional
resource links of pl atforms such as NPTEL, Swayam are appropriately provided. In an earlier
revision of curriculum in the year 2012 and 2016 in Revised scheme ‘A' and ‘B' respectively,
efforts were made to use online contents more appropriately as additional learning material s to
enhance learning of students.
In the current revision based on the recommendation of AICTE model curriculum overall
credits are reduced to 171, to provide opportunity of self -learning to learner. Learners are now
getting sufficient time for self -learning either through online courses or additional projects for
enhancing their knowledge and skill sets.
The Principals/ HoD’s/ Faculties of all the institute are required to motivate and encourage
learners to use additional online resources available on pl atforms such as NPTEL/ Swayam.
Learners can be advised to take up online courses, on successful completion they are required
to submit certification for the same. This will definitely help learners to facilitate their enhanced
learning based on their inter est.





Dr. S. K. Ukarande Dr Anuradha Muzumdar
Associate Dean Dean
Faculty of Science and Technology Faculty of Science and Technology
University of Mumbai University of Mumbai

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 3
Preface
Technical education in the country is undergoing a paradigm shift in current days. Think tank at national level are
deliberating on the issues, which are of utmost importance and posed challenge to all the spheres of technical
education. Eventually, impact of these developments was visible and as well adopted on bigger scale by almost
all universities across the country. These are primarily an adoption of CBCS (Choice base Credit System) and
OBE (Outcome based Education) with student centric and learning ce ntric approach. Education sector in the
country, as well, facing critical challenges, such as, the quality of graduates, employability, basic skills, ability to
take challenges, work ability in the fields, adoption to the situation, leadership qualities, c ommunication skills and
ethical behavior . On other hand, the aspirants for admission to engineering programs are on decline over the years.
An overall admission status across the country is almost 50%; posing threat with more than half the vacancies in
various colleges and make their survival difficult. In light of these, an All India Council for Technical Education
(AICTE), the national regulator, took initiatives and enforced certain policies for betterment, in timely manner.
Few of them are highlighted h ere, these are design of model curriculum for all prevailing streams, mandatory
induction program for new entrants, introduction of skill based and inter/cross discipline courses, mandatory
industry internships, creation of digital contents, mandate for us e of ICT in teaching learning, virtual laboratory
and so on.
To keep the pace with these developments in Technical education, it is mandatory for the Institutes & Universities
to adopt these initiatives in phased manner, either partially or in toto. Hence, the ongoing curriculum revision
process has a crucial role to play. The BoS of Electronics Engineering under the faculty of Science & Technology,
under the gamut of Mumbai University has initiated a step towards adoption of these initiatives. We, the memb ers
of Electronics Engineering Board of Studies of Mumbai University feel privileged to present the revised version
of curriculum for Electronics Engineering program to be implemented from academic year 2020 -21. Some of the
highlights of the revision are;
i. Curriculum has been framed with reduced credits and weekly contact hours, thereby providing free slots
to the students to brain storm, debate, explore and apply the engineering principles. The leisure provided
through this revision shall favour to inculcat e innovation and research attitude amongst the students.
ii. New skill based courses have been incorporated in curriculum keeping in view AICTE model
curriculum.
iii. Skill based Lab courses have been introduced, which shall change the thought process and enhance the
programming skills and logical thinking of the students
iv. Mini -project with assigned credits shall provide an opportunity to work in a group, balancing the group
dynamics, develop leadership qualities, facilitate decision making and enhance problem solving ability
with focus towards socio -economic development of the country. In addition, it shall be direct
application of theoretical knowledge in practice, thereby, nurture learners to become industry ready and
enlighten students for Research, Innovati on and Entrepreneurship thereby to nurture start -up ecosystem
with better means.
v. Usage of ICT through NPTEL/SWAYAM and other Digital initiatives of Govt. of India shall be
encouraged, facilitating the students for self-learning and achieve the Graduate Att ribute (GA)
specified by National Board of accreditation (NBA) i.e. lifelong learning.

Thus, this revision of curriculum aimed at creating deep impact on the teaching learning methodology to be
adopted by affiliated Institutes, thereby nurturing the stude nt fraternity in multifaceted directions and create
competent technical manpower with legitimate skills. In times to come, these graduates shall shoulder the
responsibilities of proliferation of future technologies and support in a big way for 'Make in Ind ia' initiative, a
reality. In the process,
BoS, Electronics Engineering got whole hearted support from all stakeholders including faculty, Heads of
department of affiliating institutes, experts faculty who detailed out the course contents, alumni, industry experts
and university official providing all procedural support time to time. We put on record their involvement and
sincerely thank one and all for contribution and support extended for this noble cause.

Boards of Studies in Electronics Engineering
Sr. No. Name Designation Sr. No. Name Designation
1 Dr. R. N. Awale Chairman 5 Dr. Rajani Mangala Member
2 Dr. Jyothi Digge Member 6 Dr. Vikas Gupta Member
3 Dr. V. A. Vyawahare Member 7 Dr. D. J. Pete Member
4 Dr. Srija Unnikrishnan Member 8 Dr. Vivek Agarwal Member

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 4
Program Structure for Third Year Electronics Engineering
UNIVERSITY OF MUMBAI
(With Effect from 2021 -2022 )

Semester V


Course
Code
Course Name Teaching Scheme
(Contact Hours)
Credits Assigned
TH PR Tut TH Pract Tut Total
ELC5 01 Principles of Control System 3 -- -- 3 -- -- 3
ELC5 02 Digital Signal Processing 3 -- 3 -- 3
ELC5 03 Linear Integrated Circuits 3 -- -- 3 -- -- 3
ELC5 04 Digital Communication 3 -- -- 3 -- -
- 3
ELDO5 01 Department Optional Course - I 3 -- -- 3 -- -- 3
ELL5 01 Principles of Control System Lab -- 2 -- -- 1 -- 1
ELL5 02 Linear Integrated Circuits Lab -- 2 -- -- 1 -- 1
ELL5 03 Digital Communication Lab -- 2 -- -- 1 -- 1
ELL5 04 Professional Communication & Ethics -II -- 2*+2 -- -- 2 -- 2
ELM5 01 Mini Project –2 A
-- 4$ -- -- 2 -- 2
Total 15 14 -- 15 07 -- 22
* Theory class; $ indicates workload of Learner (Not Faculty), for Mini Project

Course
Code Course Name Examination Scheme
Internal Assessment End
Sem.
Exam Exam.
Duration
(in Hrs) TW Pract/
Oral Total
Test 1 Test 2 Avg.
ELC501 Principles of Control System 20 20 20 80 3 -- -- 100
ELC502 Digital Signal Processing 20 20 20 80 3 -- -- 100
ELC503 Linear Integrated Circuits 20 20 20 80 3 -- -- 100
ELC504 Digital Communication 20 20 20 80 3 -- -- 100
ELDO501 Department Optional Course - I 20 20 20 80 3 -- -- 100
ELL501 Principles of Control System Lab -- -- -- -- -- 25 25 50
ELL502 Linear Integrated Circuits Lab -- -- -- -- -- 25 25 50
ELL503 Digital Communication Lab -- -- -- -- -- 25 25 50
ELL504 Professional Communication & Ethics -II -- -- -- -- -- 25 25 50
ELM501 Mini Project –2 A -- -- -- -- -- 25 25 50
Total 100 400 -- 125 125 750

Department Level Optional Course - I (ELDO 501):

1. Data Structures 3. Neural Network and Fuzzy Logic
2. Biomedical Instrumentation 4. Computer Organization Architecture

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 5

Course
Code
Course
Name Teaching Scheme Credits Assigned
Theory Practical
and
Oral Tutorial Theory TW/Practical
and Oral Tutorial Total

ELC501 Principles
of Control
System
03
--
--
03
--
--
03

Subject
Code Subject
Name Examination Scheme
Theory Marks
Term
Work Practical
and Oral Total Internal assessment
End
Sem.
Exam Exam
duratio
n
Hours Test 1 Test 2 Avg of
Test 1
and Test
2

ELC501 Principles of
Control
System 20 20 20 80 3 -- -- 100



Course Objectives:

1. To develop the understanding of fundamental principles of control systems.
2. To disseminate the basic methods for time -domain and frequency -domain analysis of control systems.
3. To develop the concept of stability and its assessment for linear -time-invariant systems.
4. To introduce the design of controllers in frequency -domain and state -space.

Course Outcomes:
After successful completion of the course students will be a ble to:
1. Derive the mathematical models of physical systems.
2. Sketch various plots in time and frequency domain a nd analyse the system using the plots.
3. Evaluat e the stability of control systems in time and frequency domain.
4. Design performance specification based controller for a given system.
5. Analyse the control systems using state -space methods and design state feedback controllers .
6. Design performance specification based controller for a given system.

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 6

Module
No. Unit
No. Contents Hrs.
1 Introduction to the Control Problem 06
1.1 Examples of control systems; introduction to the control problem; open
loop and closed loop systems; feed -forward control structure.
1.2 Differential equation models of physical systems, deriving models of
physical systems (electrical, mechanical, thermal, Op -amp circuits) Types
of models; Impulse response model; Transfer function model for
Electrical, Mechanical and Thermal systems
1.3 Block diagram and Signal Flow Gra ph (SFG) representation of control
systems; Block diagram reductions; Mason’s gain formula.
2 Time Response Analysis 06
2.1 Standard test input signals; time response of first and second order
systems for standard test inputs; Application of initial and final value
theorem. Performance specifications for second order system (no
derivation); Error constants and type of the system.
2.2 Concept of stability; Routh -Hurwitz Criteria; Relative stability analysis;
Root -Locus technique and construction of root-loci.
3 Frequency Response Analysis 08
3.1 Introduction to frequency response; Frequency response plots: Polar plot
and Bode plot; Performance specifications in frequency domain.
3.2 Stability margins in frequency domain; Mapping contours in s -plane; The
Nyquist criterion; Relative stability using Nyquist criterion.
4 Introduction to Controller Design 10
4.1 Characteristics of feedback: Sensitivity to parametric variation;
Disturbance rejection; Steady -state accuracy.
4.2 Feedback controller design using Root -locus; Reshaping the root -locus;
Cascade lead, lag and lag -lead compensator.
4.3 Feedback control design using Bode plot; Reshaping the bode plot;
Cascade lead, lag and lag -lead compensator.
5 State -space Analysis 07
5.1 Concept of state variables; State -space model; Canonical forms;
Conversion between canonical forms using similarity transforms.
5.2 Solution of state -space equation; Eigen -values and eigenvectors ;
Stability in state -space; Concept of controllability and observability.
6 Controller Design in State -space
6.1 State -feedback controller design: Pole -placement method; Ackerman’s
formula. 02

Total 39

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 7

Text Books:

1. M. Gopal, “Control Systems: Principles and Design”, 3rd edition, Tata McGraw Hill,
2008.
2. Richard Dorf, Robert Bishop, “Modern Control Systems”, 11th edition, Pearson
Education, 2008.

Reference Books:

1. Golnaraghi Farid, B. C. Kuo, “Automatic Control Systems”, 10th edition, McGraw Hill,
2017.
2. K. Ogata, “Modern Control Engineering ”, 6th edition, Prentice Hall, 2010.
3. I.J. Nagrath, M. Gopal, “Control System Engineering”, New Age International, 2009.
4. Norman Nise, “Control Systems Engineering”, Wiley, 8th edition, 2 019.

Internal Assessment (IA):
Two tests must be conducted which should cover at least 80% of syllabus. The average marks of
both the test will be considered as final IA marks

End Semester Examination:
1. Question paper will consist of 6 questions, each of 20 marks.
2. Total 4 questions need to be solved.
3. Question No.1 will be compulsory and based on entire syllabus wherein sub questions of
2 to 5 marks will be asked.
4. Remaining questions will be selected from all the modules

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 8

Course
Code
Course
Name Teaching Scheme Credits Assigned
Theory Practical
and
Oral Tutorial Theory TW/Practical
and Oral Tutorial Total

ELC502 Digital
Signal
Processing
03
--
--
03
--
--
03


Subject
Code Subject
Name Examination Scheme
Theory Marks
Term
Work Practical
and Oral Total Internal assessment
End
Sem.
Exam Exam
duratio
n
Hours Test 1 Test 2 Avg of
Test 1
and Test
2

ELC502 Digital
Signal
Processing 20 20 20 80 3 -- -- 100

Prerequisite:
ELC405: Signals and Systems

Course Objectives:
1. To introduce Fourier domain analysis of signals and systems and their efficient
implementation.
2. To expose students to various design techniques for FIR/IIR filters.
3. To unveil the students to advance s in signal processing techniques, digital signal processors
and real -world applications.

Course Outcomes:
After successful completion of the course students will be able to:
1. Analyze discrete time systems in frequency domain using Discrete Fourier Transform.
2. Design IIR digital filters to meet given filter specifications and implement the same using lattice
structure.
3. Design FIR digital filters to meet given filt er specifications and implement the same using lattice
structure.
4. Understand Architecture of DSP processors and examine the effect of hardware limitations on
performance of digital filters.
5. Investigate the need of multi -rate digital signal processing and implement multi -rate systems.
6. Apply DSP techniques in real life problems.

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 9
Module
No. Unit
No. Contents Hrs.


1 Discrete Fourier Transform and Fast Fourier Transform

10 1.1 Definition and Properti0es of DFT, IDFT, circular convolution of sequences
using DFT and IDFT, Relation between Z -transform and DFT, Filtering of
long data sequences using Overlap Save and Overlap Add Method
1.2 Fast Fourier transforms (FFT), Radix -2 decimation in time and decimation
in frequency FFT algorithms, Inverse FFT


2 Design of Infinite Impulse Response (IIR) Filters

8 2.1 Analog filter approximations: Butterworth, Chebyshev, Inverse Chebyshev
and Elliptic filters
2.2 Mapping of S-plane to Z -plane, Impulse invariance method, Bilinear
transformation method, Design of IIR digital filters from analog filters with
examples (Butterworth, Chebyshev)
2.3 Realization of IIR filters using Lattice structures




3 Design of Finite Impulse Response(FIR) Filters


7 3.1 Characteristics of FIR digital filters, Minimum Phase, Maximum Phase,
Mixed Phase and Linear Phase Filters, Frequency response and location of
zeros for linear phase FIR filters
3.2 Effect of truncation on ideal filter impulse response, Design of FIR filters
using window techniques (Rectangular, Hamming, Hanning, Blackmann,
Bartlet), Design of FIR filters using Frequency Sampling Technique
3.3 Realization of FIR filters using Lattice structures



4 DSP Processors and Finite Word Length Effects


6 4.1 Introduction to General Purpose and Special Purpose DSP processors, F ixed
point and floating -point DSP processors, Architecture of TMS320CXX
processor
4.2 Quantization, truncation and rounding, Effects due to truncation and
rounding, Input quantization error, Product quantization error, Coefficient
quantization error, Limit cycle oscillations, Finite word length effects in
FIR/IIR digital filters


5 Multirate DSP and Filter Banks

5 5.1 Introduction and concept of Multirate Processing, Decimator and
Interpolator, Decimation and Interpolation by Integer numbers, Multistage
Approach to Sampling rate converters
5.2 Sample rate conversion using Polyphase filter structure, Type I and Type II
Polyphase Decomposition


6 DSP Applications

3 6.1 Application of DSP in Radar Signal Processing
6.2 Application of DSP in Speech Signal Processing: Echo cancellation
6.3 Application of DSP in Biomedical Signal Processing: Denoising of ECG
Signal
Total 39

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 10
Text Books:
1. Proakis J., Manolakis D., “ Digital Signal Processing ”, 4th Edition, Pearson Education,
2007
2. Tarun Kumar Rawat, “ Digital Signal Processing” , Oxford University
Press, 2015

Reference Books:
1. L .R. Rabiner and B. Gold, “ Theory and Applications of Digital Signal Processi ng”,
Prentice -Hall of India, 2006.
2. Oppenheim A., Schafer R., Buck J., “ Discrete Time Signal Processing ”,
2nd Edition, Pearson Education
3. Johnson J. R., “ Introduction to Digital Signal Processing” , Prentice Hall
4. Emmanuel C. Ifeachor, Barrie W. Jervis, “ Digital Signal Processing: A Practical
Approach ”, Pearson Education, 2001
5. Sanjit K. Mitra, Digital Signal Processing – A Computer Based Approach – edition 4e
McGraw Hill Education (India) Private Limited
6. B. Venkata Ramani and M. Bhaskar, “ Digital Signal Processors,
Architecture, Programming and Applications ”, Tata McGraw Hill, 2011.

Internal Assessment (IA):

Two tests must be conducted which should cover at least 80% of syllabus. The average marks of both
the tests will be considered as final IA marks.

End Semester Examination:
1. Question paper will comprise of 6 questions, each of 20 marks.
2. Total 4 questions need to be solved.
3. Question No.1 will be compulsory and based on the entire syllabus wherein sub questions of 2
to 5 marks will be asked.
4. Remaining questions will be selected from all the modules.

Students are encouraged to explore more applications which can be assessed by the faculty.

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 11
Subject
Code Subject Name Teaching Scheme Credits Assigned
Theory Practical Tutorial Theory Practical Tutorial Total
ELC 503 Linear Integrated
Circuits 03 -- 03 -- 03

Subject
Code Subject
Name Examination Scheme
Theory Marks
Term
Work Practi
cal Oral Total Internal A ssessment End
Sem.
Exam Exam
duration
Hours Test
1 Test
2 Avg of Test 1
and Test 2
ELC503 Linear
Integrated
Circuits 20 20 20 80 03 100



Course Pre -requisite:
1. Electronic Devices and Circuits I
2. Electronic Devices and Circuits II


Course Objectives:
1. To teach fundamental principles of standard linear integrated circuits.
2. To develop a overall approach for students from selection of integrated circuit, study its specification,
the functionality, design and practical applications


Course Outcomes:
After successful completion of the course students will be able to:
1. Demonstrate an understanding of fundamentals of integrated circuits.
2. Analyze the various applications and circuits based on particular linear integrated circuit.
3. Select and use an appropriate integrated circuit to build a given application.
4. Design an application with the use of integrated circuit
5. Design a real life application using certain linear Integrated Circuits
6. Design of power supply with proper selection of the regulator IC.

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 12


Recommended Books :

1. Sergio Franco, “ Design with operational amplifiers and analog integrated circuits ”, Tata
McGraw Hill, 3rd Edition.
2. William D. Stanley, “ Operational Amplifiers with Linear Integrated Circuits ”, Pearson, 4th
Edition
3. D. Roy Choudhury and S. B. Jain, “ Linear Integrated Circuits ”, New Age International
Publishers, 4th Edition.
4. David A. Bell, “ Operation Amplifiers and Linear Integrated Circuits ”, Oxford University Module
No. Unit
No. Contents Hrs.
1 Module 1 Fundamentals of Operational Amplifier 04
1.1 Block diagram of op -amp, Characteristics of op -amp, op -amp parameters, high
frequency effects on op -amp gain and phase, slew rate limitation, single supply
versus dual supply op -amp
1.2 Configurations of op -amp: - open loop and closed loop configuration,
Inverting amplifier and Non inverting amplifier
2 Module 2: -Linear Applications of Operational Amplifier 08
2.1 Adder, Sub tractor, Difference amplifier, Integrator, Differentiator, Three Op -
amp Instrumentation amplifier, V -I converter, I -V converter
2.2 Active Filters: - Transfer function, Design of First order and Second order of
LPF, HPF, BPF and BRF
2.3 Oscillators: - RC phase shift and Wein bridge oscillators
3 Module 3: -Non-linear Applications of Operational Amplifier 08
3.1 Voltage Comparators, Applications of comparator as zero crossing detector,
window comparator, level detector, Schmitt triggers, Half wave and full wave
Precision rectifiers, Peak detectors, Sample & Hold circuit, Log and Antilog
amplifier
3.2 Waveform generators: - Square wave and Triangular wane generator circuit
4 Module 4: - Data Converters 05
4.1 Analog to Digital: - Performance parameters, Simple ramp, Dual slop,
Successive approximation and Flash ADC
4.2 Digital to Analog: - Performance parameters, Binary weighted and R/2R ladder
5 Module 5: - Special Purpose Integrated Circuits 07
5.1
Monolithic Timer: -NE555, functional block diagram, working, design and
applications.
5.2 Functional block diagram, working, functional block diagram, working, design
and applications. Voltage controlled oscillator 566, PLL 565, Function
generator XR 2206, Power amplifier LM 380
6 Module 6: - Voltage Regulators 07
6.1 Functional block diagram of Voltage Regulators, Design of fixed voltage
Regulators (78XX and 79XX), three terminal adjustable voltage regulators (LM
317 and LM 337)
6.2 Functional block diagram, working and design of IC 723 with current limit and
current foldback protection, Switching regulator topologies
Total 39

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 13
Press, Indian Edition.
5. Ramakant A. Gayakwad, “ Op-Amps and Linear Integrated Circuits ”, Pearson Prentice Hall,
4th Edition.
6. Ron Mancini, “ Op Amps for Everyone ”, Newnes, 2nd Edition.
7. J. Millman and A. Grabel, “ Microelectronics ”, Tata McGraw Hill, 2nd Edition.
8. R. F. Coughlin and F. F. Driscoll, “ Operation Amplifiers and Linear Integrated Circuits ”,
Prentice Hall, 6th Edition.
9. J. G. Graeme, G. E. Tobey and L. P. Huelsman, “ Operational Amplifiers - Design &
Applications ”, NewYork: McGraw -Hill, Burr -Brown Research Corporation.


Internal Assessment (IA):
Two tests must be conducted which should cover at least 80% of syllabus. The average
marks of both the tests will be considered for final internal assessment.

End Semester Examination :
1. Question paper will comprise of 6 questions, each carrying 20 marks.
2. The students need to solve total 4 questions.
3. Question No.1 will be compulsory preferably objective type and based on entire syllabus.
4. Remaining questions (Q.2 to Q.6) will be selected from all the modules.

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 14


Subject
Code Subject Name Teaching Scheme Credits Assigned
ELC504 Digital
Communication Theory Practical Tutorial Theory Practical Tutorial Total
03 -- -- 03 -- -- 03


Subject
Code Subject Name Examination Scheme
Theory Marks
Term
Work Prac
tical Oral Total Internal assessment End
Sem.
Exa
m Exam
durati
on
Hours Test
1 Test
2 Avg of Test
1 and Test 2
ELC504 Digital
Communicatio n 20 20 20 80 03 -- -- -- 100



Course Pre -requisite: ELX404 Principles of Communication Engineering
ELX405 Signals & Systems

Course Objectives:

1. Understand the typical subsystems of a digital communication system.
2. Understand the significance of the trade -off between SNR and Bandwidth.
3. Understand the effect of ISI in Baseband transmission of a digital signal.
4. Analyze various Digital modulation techniques.
5. Identify the necessity of Source encoding and Channel encoding in Digital Communication.

Course Outcomes:

After successfu l completion of the course students will be able to:
1.Comprehend the advantages of digital communication over analog communication and explain need
for various subsystems in Digital communication systems
2. Realize the implications of Shannon -Hartley Capacity theorem while designing the efficient Source
encoding technique.
3. Understand the impact of Inter Symbol Interference in Baseband transmission and methods to
mitigate its effect .
4. Analyze various Digital modulation methods and assess them based on parameters such as
spectral efficiency, Power efficiency, Probability of error in detection.
5. Explain the concept and need for designing efficient Forward Error Correcting codes.
6. Understand the Optimum reception of Digital signals.

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 15




Module
No. Unit
No. Contents Hrs.






1 Introduction to Digital communication system and Probability Theory






07 1.1 Introduction to Digital communication system, significance of AWGN Channel,
pulse dispersion in the channel.
1.2 Concept of Probability Theory in Communication Systems: Introduction to
probability and sample space, Bayes’ rule, conditional probability and statistical
independence, relation between probability and probability density, PDF, CDF,
Random variables, Mean and Variance of Random variables and sum of random
variables, Definition with examples.
1.3 Gaussian, Rayleigh PDF & Rician Distribution, Binomial Distribution, Poisson
Distribution, Central -Limit Theorem.

2 Information Theory and Source Coding
05 2.1 Measure of Information, Entropy, Information rate, Channel capacity, Shannon –
Hartley Capacity Theorem and its Implications.
2.2 Shannon -Fano encoding, Huffman encoding, Code Efficiency and Redundancy
examples and applications of source coding.


3 Pulse Shaping for Optimum Transmission 04
3.1 Line codes and their desirable properties, PSD of digital data
3.2 Baseband PAM transmission: Concept of Inter symbol interference (ISI), Raised
Cosine filter, Nyquist Bandwidth. Concept of equalizer to overcome ISI.



4 Digital Modulation Techniques
10 4.1 Concept of Binary and M -ary transmission, Coherent and Non - Coherent reception,
Power spectral density of Pass -band signal, Signal space Representation and
Euclidian distance.
4.2 Pass Band Amplitude modulation and Demodulation: BASK, M -ary PAM, Digital
Phase Modulation & Demodulation: BPSK, OQPSK, QPSK, M -ary PSK, QAM,
Digital Frequency Modulation and Demodulation: BFSK, MSK, M -ary FSK,
Introduction to spread spectrum modulation, OFDM.
4.3 Comparison of all techniques based on Spectral efficiency, Power efficiency,
Probability of error in detection.
5 Error Control codes
9
5.1 Need for channel encoding, Concept of Error detection and correction, Forward
Error correction.

5.2 Linear block codes: Hamming Distance, Hamming Weight, Systematic codes,
Syndrome Testing.

5.3 Cyclic codes ; Generator polynomial for Cyclic codes, Systematic cyclic codes,
Feedback shift register for Polynomial division.

5.4 Convolution codes : Convolution encoder, Impulse response of encoder, State
diagram, trellis diagram Representations.
6 Optimum Reception of Digital Signal 04
6.1 A baseband signal receiver and its Probability of error.
6.2 The Optimum receiver and Filter.
6.3 Matched filter and its probability of error.
Total 39

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 16

Text Books:

1. Haykin Simon, “Digital Communication Systems ,” John Wiley and Sons, New Delhi,
Forth Edition, 2014.
2. H. Taub, D. Schlling, and G. Saha, “ Principles of Communication Systems, ” Tata Mc -
Graw Hill, New Delhi, Third Edition, 2012.
3. Lathi B P, and Ding Z., “ Modern Digital and Analog Communication Systems ,”
Oxford University Press, Forth Edition, 2009.
4. R N Mutagi, “Digital Communication” , Oxford University Press, 2nd Ed .

Reference Boo ks:

1. John G. Proakis, “ Digital Communications ”, Mc Graw Hill , 5th Ed
2. Sklar B, and Ray P. K., “Digital Communication: Fundamentals and
applications,” Pearson, Dorling Kindersley (India), Delhi, Second Edition, 2009.
3. T L Singal, “ Analog and Digital Communication ,” Tata Mc -Graw Hill, New Delhi,
First Edition, 2012.
4. P Ramakrishna Rao, “Digital Communication ,” Tata Mc -Graw Hill, New Delhi,
First Edition, 2011.
5. Amitabha Bhattacharya, “ Digital Communication ”, Tata McG raw Hill


Internal Assessment (IA):
Two tests must be conducted which should cover at least 80% of syllabus. The average marks
of both the test will be considered as final IA marks

End Semester Examination:
1. Question paper will comprise of 6 questions, each of 20 marks.
2. Total 4 questions need to be solved.
3. Question No.1 will be compulsory and based on entire syllabus wherein sub questions of
2 to 5 marks will be asked.
4. Remaining questions will be selected from all the module

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 17


Subject
Code Subject
Name Teaching Scheme Credits Assigned
Theory Practical Tutorial Theory Practical Tutorial Total
ELDO501 Data
structures 03 - -- 03 - -- 03


Subject
Code Subject
Name Examination Scheme
Theory Marks
Term
Work Prac
tical Oral Total Internal assessment End
Sem.
Exa
m Exam
duration
Hours Test
1 Test
2 Avg of Test 1
and Test 2
ELDO501 Data
structures 20 20 20 80 03 -- -- --- 100




Course Prerequisite: C Programming

Course Objectives:
1. To understand basic linear and non -linear data structures.
2. To implement various operations on Arrays, linked list, stack, queue, binary tree, and graph.
3. To study different sorting and searching techniques.
4. To analyze efficient data structures to solve real world problems.

Course Outcomes:

After successful completion of the c ourse students will be able to:
1. Understand various linear data structures.
2. Perform operations on linear data structures.
3. Comprehend various nonlinear data structures.
4. Implement various operations on nonlinear data structures.
5. Analyze appropriate sorting and searching techniques for a given problem.
6. Apply appropriate data structure and algorithms for solving real world problems.

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 18

Module
No. Unit
No. Contents Hrs.
1 Introduction to Data Structures 04
Introduction to Data Structures, Types of Data Structures – Linear and
Nonlinear, Operations on Data Structures, Concept of array, Static arrays vs
Dynamic Arrays, structures.
2 Stack and Queues 08
Introduction, Basic Stack Operations, Representation of a Stack using Array,
Applications of Stack – Well form -ness of Parenthesis, Infix to Postfix
Conversion and Postfix Evaluation.
Queue, Operations on Queue, Representation of a Queue using array, C ircular
Queue, concept of priority Queue, Applications of Queue -Round Robin
Algorithm.
3 Linked List 08
Introduction, Representation of Linked List, Linked List v/s Array, Types of
Linked List - Singly Linked List (SLL), Operations on Singly Linked List :
Insertion , Deletion ,reversal of SLL, Print SLL .
Implementation of Stack and Queue using Singly Linked List.
Introduction to Doubly Linked List and Circular Linked List
4 Trees 08
Introduction, Tree Terminologies, Binary Tree, Types of Binary Tree,
Representation of Binary Trees, Binary Tree Traversals, Binary Search Tree,
Operations on Binary Search Tree, Applications of Binary Tree – Expression
Tree, Huffman Encoding.
5 Graphs 03
Introduction, Graph Terminologies, Representation of graph (Adjacency
matrix and adjacency list), Graph Traversals – Depth First Search (DFS) and
Breadth First Search (BFS), Application – Topological Sorting.
6 Searching and Sorting 08
Introduction to Searching: Linear search, Binary search
Sorting: Internal VS. External Sorting, Sorting Techniques: Bubble, Insertion,
selection, Quick Sort, Merge Sort, Comparison of sorting Techniques,
Hashing Techniques, Different Hash functions, Collision & Collision
resolution techniques: Linear and Quadra tic probing, Double hashing.
Total 39

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 19
Text Books:

1. Tenenbaum, A. M. , “Data structures using C ”, Pearson Education India, 1990 .
2. Tremblay, J. P., & Sorenson, P. G. , “An introduction to data structures with
applications ”, McGraw -Hill, Inc, 1984 .
3. Thareja, R. , “Data structures using C ”, Oxford University Pres, 2014 .
4. Gilberg, R. F., Forouzan, B. A., “Data Structures ”, United States, Cengage Learning ,
2004 .
5. Balagurusamy, E., “Data Structures Using C ”, McGraw -Hill Education (India) , 2013 .

Reference Books:

1. Bhasin, H., “ Algorithms : Design and Analysis ”, Oxford University Press , 2015 .
2. DATA STRUCTURES USING C , 2E. Tata McGraw -Hill Education , 2006 .
3. Rajasekaran, S., Sahni, S., Horowitz, E., “Computer Algorithms ”, United S tates,
Silicon Press , 2008.
4. Lipschutz, S., “Data Structures ”, McGraw Hill Education (India) Private Limited.
Schaum’s Outlines , 2014 .



Internal Assessment (IA):
Two tests must be conducted which should cover at least 80% of syllabus. The average marks of both
the test will be considered as final IA marks

End Semester Examination:
1. Question paper will consist of 6 questions, each of 20 marks.
2. Total 4 questions need to be solved.
3. Question No.1 will be compulsory and based on the entire syllabus wherein sub questions of 2 to 5
marks will be asked.
4. Remaining questions will be selected from all the module

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 20


Subject
Code Subject Name Teaching Scheme Credits Assigned
Theory Practical Tutorial Theory Practical Tutorial Total
ELDO501 Biomedical
Instrumentation 03 - -- 03 - -- 03


Subject
Code Subject Name Examination Scheme
Theory Marks
Term
Work Practical Oral Total Internal
assessment
End
Sem.
Exam Exam
duration
Hours Test
1 Test
2 Avg
of
Test
1
and
Test
2

ELDO501 Biomedical
Instrumentation
20 20 20 80 03 -- 100



Course Pre -requisite:
1. Knowledge of Instrumentation and Measurement
2. Display devices and measurement tools
3. Knowledge of Human anatomy

Course Objectives:
1. To introduce the fundamentals of Biomedical Instrumentation Systems
2. To explore the human body parameter measurement setups
3. To make the students understand the basic concepts of diagnostic, therapeutic and imaging
systems.

Course Outcomes:
After success ful completion of the course students will be able to:
1. Get basic technical competence in the field of Medical Instrumentation and understand the
importance of electrical safety in hospital equipment.
2. Explain the concept of bio potential generation and meas urement using electrodes with
their types.
3. Build foundation of knowledge of analytical Instruments in Biomedical field
4. Acquire knowledge about the Diagnostic Equipment like ECG, EEG, EMG machines
5. Describe the working principle of patient monitoring and a ssistive systems
6. Distinguish between various imaging modalities such as X -ray, CT, MRI etc. based on
their principles.

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 21




Text Books:
1. R S. Khandpur , “Handbook of Biomedical Instrumentation ”, 2004 (TMH Pub).
2. Leslie Cromwell, “Biomedical Instrumentation and Measurements‖ ”, Pearson
Education, 1980.
3. J G. Webster, “ Medical Instrumentation, Application and Design ”, (John Wiley).

Reference Books:
1. Carr –Brown “Introduction to Biomedical Equipment Technology”,(PHI Pub)
2. L. A. Geddes & L. E. Baker, “Principles of Applied Biomedical Instrumentation ”,
Wiley India Pvt. Ltd.
3. Richard Aston, “Principles of Biom edical Instrumentation and Measurements”, Merril Module
No. Unit
No. Contents Hrs.
1 Module 1 - Fundamentals of Biomedical Instrumentation: 6
1.1 Basics of Medical Instrumentation, Recording Systems & Biomedical
Recorders, Types of biomedical equipment – Analytical, Diagnostic,
Therapeutic and Surgical equipment
1.2 Calibration of medical devices and testing of biomedical equipment, Electrical
classification of Biomedical Equipment Patient Monitoring Systems, Patient
safety
2 Module 2 - Measurement of bio potentials 6
2.1 Basics of Cardiovascular and Nervous systems, Bio -potential generation,
Electrodes for ECG, EEG, EMG
2.2 Electrode -tissue interfaces, electrode -electrolyte and electrolyte -skin
interfaces, Skin contact impedance
3 Module 3 - Analytic Instruments 6
3.1 Principle and working of - Pulse Oximeter, Plethysmographs, Blood Flow
Meters
3.2 Introduction to Spectro photometers, Electrodes for pH, pO2 and pCO2
measurement, Blood gas analysers –, Blood cell counters, Radio Immuno Assay
and ELISA techniques.
4 Module 4 - Diagnostic Equipment 7
4.1 Electrocardiography (ECG) –ECG in diagnosis –Lead systems – Artifacts –
ECG Machine. Heart sounds – Phonocardiography (PCG)
4.2 Electro encephalography (EEG), EEG Machine, Artifacts, Electromyography
(EMG) –Electro neurography (ENG), Principles and applications
5 Module 5 - Patient monitoring and Assistive system 7
5.1
Bed-side monitors, Central station monitors, Computerized arrhythmia
monitors
5.2 Cardiac Pacemakers, Defibrillators, Ventilators
6 Module 6 - Imaging Equipment 7
6.1 Construction and working of X ray, CT, MRI imaging
6.2 Basic working principle of PET, SPECT, Ultrasound imaging
Total 39

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 22
Publishing Co.
4. Chanderlekha Goswami, “Handbook of Biomedical Instrumentation”, Manglam
Publications.



Internal Assessment (IA):
Two tests must be conducted which should cover at least 80% of syllabus. The average
marks of both the test will be considered as final IA marks

End Semester Examination:
1. Question paper will comprise of 6 questions, each of 20 marks.
2. Total 4 questions need to be solved.

3. Question No.1 will be compulsory and based on entire syllabus wherein sub
questions of 2 to 5 marks will be asked.
4. Remaining questions will be selected from all the module

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 23

Course
Code
Course Name Teaching Scheme Credits Assigned
Theory Practical
and
Oral Tutorial Theory TW/Practical
and Oral Tutorial Total
ELDO501 Neural Network
and Fuzzy Logic
03
--
--
03
--
--
03

Subject
Code Subject
Name Examination Scheme
Theory Marks
Term
Work Prac
tical Oral Total Internal assessment
End
Sem.
Exam Exam
duration
Hours Test
1 Test
2 Avg of
Test 1
and Test
2
ELDO501 Neural
Network
and Fuzzy
Logic 20 20 20 80 03 -- -- --- 100



Course Pre -requisite :

1. Knowledge of linear algebra, multivariate calculus, and probability theory
2. Knowledge of a programming language (PYTHON/C/C ++/ MATLAB recommended)

Course Objectives:

1. To study basics of biological Neural Network.
2. To understand the different types of Ar tificial Neural Networks.
3. To identify the applications of ANN.
4. To study fuzzy logic and fuzzy systems

Course Outcomes:
After successful completion of the course students will be able to:
1. Understand learning rules of ANN.
2. Apply the concepts of supervised and unsupervised neural networks
3. Explain the importance of feedback networks
4. Understand Associative memory networks
5. Appreciate the need for fuzzy logic and control
6. Illustrate neural networks practical applications

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 24
Module
No. Unit
No. Contents Hrs.
1 Introduction 05
1.1 Biological neurons, McCulloch -Pitts neuron model, Types of activation function,
Network architectures, Knowledge representation. Linear & non -linear separable
classes & Pattern classes.
1.2 Learning processes: Supervised learning, Unsupervised learning and Reinforcement
learning
1.3 Learning Rules: Hebbian Learning Rule, Perceptron Learning Rule, Delta Learning
Rule, Widrow -Hoff Learning Rule, Correlation Learning Rule, Winner Take -All
Learning Rule.
1.4 Applications and scope of Neural Networks.
2 Supervised Learning Networks 08
2.1 Perception Networks – continuous & discrete, Perceptron convergence theorem,
Adaline, Madaline, Method of steepest descent and least mean square algorithm.
2.2 Back Propagation Network.
2.3 Radial Basis Function Network.
3 Unsupervised Learning Networks 08
3.1 Fixed weights competitive nets.
3.2 Kohonen Self -organizing Feature Maps, Learning Vector Quantization.
3.3 Adaptive Resonance Theory – 1.
4 Associative Memory Networks 06
4.1 Introduction, Training algorithms for Pattern Association
4.2 Auto -associative Memory Network, Hetero -associative Memory Network,
Bidirectional Associative Memory.
4.3 Discrete Hopfield Networks.
5 Fuzzy Logic 08
5.1 Fuzzy Sets, Fuzzy Relations and Tolerance and Equivalence .
5.2 Fuzzification and Defuzzification
5.3 Fuzzy Controllers.
6 Case studies on ANN 04
6.1 Handwritten Digit Recognition, Process Identification, Expert Systems for Low
Back Pain Diagnosis.
Total 39

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 25
Text Books:

1. Jacek M. Zurada, “Introduction to Artificial Neural Systems,” Jaico Publishing House.
2. Timothy J. Ross, “Fuzzy Logic with Engineering Applications,” 3rd edition, Wiley
India.
3. S. N. Sivanandam and S. N. Deepa, “Principles of Soft Computing,” 3rd edition,Wiley
India.
Reference Books:

1. Simon Haykin, “Neural Networks A Comprehensive Foundation”, 3rd edition Pearson
Education.
2. S Rajasekaran and G A Vijayalakshmi Pai, “Neural Networks and Fuzzy Logic and
Genetic Algorithms “, PHI Learning.


Internal Assessment (IA):
Two tests must be conducted which should cover at least 80% of syllabus. The average marks
of both the test will be considered as final IA marks

End Semester Examination:
1. Question paper will comprise of 6 questions, each of 20 marks.
2. Total 4 questions need to be solved.
3. Question No.1 will be compulsory and based on entire syllabus wherein sub questions
of 2 to 5 marks will be asked.
4. Remaining questions will be selected from all the modules


Note: *Students are encouraged to explore more applications which can be assessed by the
faculty.

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 26
Subject
Code Subject Name Teaching Scheme Credits Assigned
Theory Practical Tutorial Theory Practical Tutorial Total
ELDO501 Computer
Organization and
Architecture 03 -- -- 03 -- -- 03


Subject Code Subject
Name Examination Scheme
Theory Marks
Term
Work Practical Oral Total Internal
assessment
End
Sem.
Exam Exam
duration
Hours Test
1 Test
2 Avg
of
Test
1
and
Test
2
ELDO501 Computer
Organization
and
Architecture 20 20 20 80 03 -- -- -- 100




Course Pre -requisite:

1. Digital Electronics
2. Fundamental concepts of processing

Course Objectives:
1. To introduce th e learner to the design aspects this can lead to maximized performance of
a Computer.
2. To introduce the learner to various concepts related to Parallel Processing
3. To highlight the various architectural enhancements in modern processors.


Course Outcomes:
After successful completion of the course students will be able to:

1. Define the performance metrics of a Computer
2. Distinguish between CISC and RISC Design Philosophies
3. Explain the design considerations of Processor, Memory and I/O in Computer systems
4. Analyze the advantages and limitations of Parallelism in systems
5. Apply the principles of pipelining to improve performance
6. Evaluate the various architectural enhancements in modern processors

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 27














Module
No. Unit
No. Contents Hrs.
1 Introduction to Computer Organization 05
1.1 Fundamental Units of a Computer
1.2 Introduction to Buses
1.3 Number Representation methods - Integer and Floating -point, Booth's
Multiplier, Restoring and Non -Restoring Division
1.4 Basic Measures of Computer Performance - Clock Speed, CPI, MIPs and
MFlops
2 Processor Organization and Architecture 08
2.1 CPU Architecture, Register Organization, Instruction cycle, Instruction
Formats, Addressing Modes
2.2 Control Unit Design - Hardwired and Micro -programmed Control: Vertical
and Horizontal Micro -Instructions, Nano -programming
2.3 Comparison between CISC and RISC architectures
3 Memory Organization 10
3.1 Classification of Memories -Primary and Secondary Memories, RAM
(SRAM and DRAM) and ROM (EPROM, EEPROM), Memory Inter - leaving
3.2 Memory Hierarchy, Cache Memory Concepts, Mapping Techniques, Write
Policies, Cache Coherency
3.3 Virtual Memory Management -Concept, Segmentation, Paging, Page
Replacement policies
4 Input/Output Organization 04
4.1 Types of I/O devices and Access methods, Types of Buses, Bus
Arbitration
4.2 Direct Memory Access (DMA)
5 Parallelism 06
5.1
Introduction to Parallel Processing Concepts, Flynn's classification,
Amdahl's law
5.2 Pipelining - Concept, Speedup, Efficiency, Throughput, Types of Pipeline
hazards and solutions
6 Architectural Enhancements 06
Superscalar Architectures, Out -of-Order Execution, Multi -core processors,
Clusters, GPU, Processing -in -Memory (PIM)
Total 39

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 28

Text Books:
1. William Stallings, “ Computer Organization and Architecture: Designing for
Performance ”, Eighth Edition, Pearson.
2. C. Hamacher, Z. Vranesic and S. Zaky, "Computer Organization", McGraw Hill, 2002.


Reference Books:
1. J.P. Hayes, "Computer Architecture and Organization", McGraw -Hill, 1998.
2. B. Govindarajulu, “ Computer Architecture and Organization: Design Principles and
Applications ”, Second Edition, Tata McGraw -Hill.
3. D. A. Patterson and J. L. Hennessy, "Computer Organization and Design - The
Hardware/Software Interface", Morgan Kaufmann, 1998.



Internal Assessment (IA):
Two tests must be conducted which should cover at least 80% of syllabus. The average
marks of both the test will be considered as final IA marks

End Semester Examination:
1. Question paper will comprise of 6 questions, each of 20 marks.
2. Total 4 questions need to be solved.
3. Question No.1 will be compulsory and based on entire syllabus wherein sub
questions of 2 to 5 marks will be asked.
4. Remaining questions will be selected from all the modules

Page 33

Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 29

Subject
Code Subject
Name Teaching Scheme Credits Assigned
Theory Practical Tutorial Theory Practical Tutorial Total
ELL501 Principles
of Control
System Lab -- 02 -- -- 01 -- 01

Subject
Code Subject Name Examination Scheme
Theory Marks
Term
Work Practical
And
Oral Total Internal assessment End
Sem.
Exam Exam
duration
Hours Test
1 Test
2 Avg of Test
1 and Test
2
ELL501 Principles of
Control System
Lab
25 25 50

Term Work:

At least 10 experiments covering the entire syllabus of ELL501 (Principles of Control System) should be
set to have well predefined inference and conclusion. The experiments should be student centric and attempt
should be made to make experiments more meaningful, interesting. Simulation experiments are also
encouraged. Experiments must be graded fr om time to time. The grades should be converted into marks as
per the Credit and Grading System manual and should be added and averaged. The grading and term work
assessment should be done based on this scheme. The final certification and acceptance of ter m work
ensures satisfactory performance of laboratory work and minimum passing marks in term work. Practical
and Oral exams will be based on the entire syllabus.




Course Outcomes:

After successful completion of the course students will be able to:
1. Analyse a control system in time and frequency domain.
2. Design a performance specification based controller in time and frequency domain.
3. Develop and tune PID controller for given control system.
4. Evaluate controllability and observability of a control syst em.
5. Design a state feedback controller according to given specifications.

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 30


Suggested List of Experiments
(Expected percentage of H/w and software experiments should be 60% & 40% respectively)


Sr.
No. Experiment Title
1 To study the time response of a first -order and second -order system to standard input
signals.
2 To study the frequency response of a second -order system to standard input signals.
3 To solve a differential equation model using simulation software.
4 To study the steady -state errors for type -0, 1 and 2 systems.
5 To design a controller according to given performance specifications using root -locus.
6 To design a controller according to given performance specifications using bode plot.
7 To design appropriate lag, lead or lag -lead compensator using bode plot.
8 To perform stability analysis of several control systems using Nyquist plots.
9 To study similarity transforms for state -space canonical forms.
10 To study controllability and observability of control systems.
11 To design a state feedback controller using pole -placement and ackerman ’s formula .
12 To introduce the PID controller and its tuning.
(Experiments can be performed online using simulation software as well as hardware. Free
simulation software like Scilab can be used to perform the experiments. )


Note:
Suggested List of Experiments is indicative. However, flexibility lies with individual course
instructors to design and introduce new, innovative and challenging experiments, (limited to
maximum 30% variation to the suggested list) from within the curriculum, so that the
fundamentals and applications can be explored to give greater clarity to the students and they
can be motivated to think different ly.

Teachers are encouraged to develop a strong understanding of the subject using case studies
like the one shown in [1] and [2].




[1] M. Gunasekaran and R. Potluri. Low -cost undergraduate control systems experiments using
microcontroller -based control of a dc motor. IEEE Transactions on Education, 55(4):508 – 516,
Nov. 2012

[2] Control Systems Laboratory Manual, EE380, IIT Kanpur.
https://www.iitk.ac.in/ee/data/Teaching_labs/Control_System/EE380_labmanual.pdf

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 31



Subject
Code Subject Name Teaching Scheme Credits Assigned
Theory Practical Tutorial Theory TW/ Practical Tutorial Total
ELL502 Linear Integrated
Circuits Lab -- 02 -- -- 01 -- 01



Subject
Code

Subject
Name Examination
Scheme
Theory
Marks
Term
Work
Practical
and
Oral
Total
Internal
assessment End
Sem.
Exam Exam
duration
Hours Test
1 Test
2 Avg
of
Test
1
and
Test
2
ELL 502 Linear
Integrated
Circuits Lab -- -- -- -- -- 25 25 50


Course Pre -requisite:
 Electronic Devices and Circuits I and II

Course Objectives:
1. To teach fundamental principles of standard linear integrated circuits.
2. To develop a overall approach for students from selection of integrated circuit, study its
specification, the functionality, design and practical applications

Course Outcomes:
After successful completion of the course student will be able to
1. Demonstrate an understanding of fundamentals of integrated circuits.
2. Anal yze the various applications and circuits based on particular linear integrated circuit.
3. Select and use an appropriate integrated circuit to build a given application.
4. Design an application with the use of integrated circuit
5. Demonstrate use of ADC and DAC to sense and control physical quantities
6. Design the Power supply for the given specifications.


Term Work: At least six experiments based on the entire syllabus of Subject (Linear Integrated Circuits)
should be set to have well predefined inference and conclusion. Few computation/simulation based
experiments are encouraged. The experiments should be students’ centric and attempt should be made to
make experiments more meaningful, interesting and innova tive. Term work assessment must be based on
the overall performance of the student with every experiment graded from time to time . The grades
should be converted into marks as per the Credit and Grading System manual and should be added and

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 32
averaged . The g rading and term work assessment should be done based on this scheme. The final
certification and acceptance of term work ensures satisfactory performance of laboratory work and minimum
passing marks in term work. Practical and Oral exam will be based on th e entire syllabus.



Suggested List of Experiments
(Expected percentage of H/w and software experiments should be 60% & 40% respectively)


Sr.
No.
Experiment Name
1 Experiment on op amp parameters
2 Experiment on design of application using op amp ( Linear)
3 Experiment on implementation of op amp application e.g. oscillator
4 Experiment on non -linear application (e.g. comparator, Astable and mono -stable Multi -
vibrator) of op amp
5 Experiment on non -linear application (e.g. peak detector, Precision Rectifier) of op amp
6 Experiment on ADC interfacing
7 Experiment on DAC interfacing
8 Experiments on IC 555 (Astable and mono -stable Multi -vibrator)
9 Experiment on voltage regulator Design of LVLC, LVHC,HVLC
10 Experiment on voltage regulator Design of HVLC, HVHC
11 Experiment on voltage regulator Design for Fold -back current limiting circuit.
12 Experiment based on VCO 566 and PLL565
13 Experiment on implementation of instrumentation system (e.g. data acquis ition).


Note:
Suggested List of Experiments is indicative. However, flexibility lies with the individual course
instructor to design and introduce new, innovative and challenging experiments, (limited to
maximum 30% variation to the suggested list) from within the curriculum, so that, the
fundamentals and applications can be explored to give great er clarity to the students and they
can be motivated to think differently.

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UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 33






Term Work:
Lab session includes Ten experiments
The experiments will be based on the syllabus contents.

1. Minimum 10 experiments need to be conducted, out of which at least four experiments
should be software -based (Scilab, MATLAB, LabVIEW, Python, Octave etc) . The
experiments should be set to have well predefined inference and conclusion.
2. The grades should be converted into marks as per the Credit and Grading System manual
and should be added and averaged. The grading and term work assessment should be done
based on this scheme.
3. The final certification and acceptance of term work ensures satisfactory performance of
laboratory work and minimum passing marks in term work. Practical and Oral exam will
be based on the entire syllabus









Subject
Code Subject Name Teaching Scheme Credits Assigned
ELL503 Digital Communication
Lab Theory Practical Tutorial Theory Practical Tutorial Total
-- 02 -- -- 01 -- 01


Subject
Code

Subject
Name Examination
Scheme
Theory
Marks
Term
Work
Pract
ical
Oral
Total Internal assessment End
Sem.
Exa
m Exam
duratio
n Hours Test
1 Test
2 Avg of Test 1
and Test 2
ELL503 Digital
Communication
Lab -- -- -- -- -- 25 25 -- 50

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 34

Suggested List of Experiments


Note:
Suggested List of Experiments is indicative. However, flexibility lies with the individual
course instructor to design and introduce new, innovative and challenging experiments,
(limited to maximum 30% variation to the suggested list) from within the curriculum, so
that, the fundamentals and applications can be explored to give greater clarity to the
students and they can be motivated to think differently.

Sr. No. Experiment Name
1 Line codes
2 Binary modulation techniques: BASK,BPSK,BFSK
3 M-ary modulation techniques: QPSK ,QAM
4 Minimum shift Keying
5 PDF& CDF of Raleigh / Normal/ Binomial Distributions
6 Eye pattern, Power factor for PAM signal
7 Source encoding: Huffman coding for Binary symbols
8 Shannon -Hartley equation to find the upper limit on the Channel Capacity
9 Linear Block code : code generation, Syndrome
10 Cyclic code -code generation, Syndrome
11 Convolutional code -code generation from generator sequences
12 Generation of FHSS and DSSS signal
13 Error performance and Quality factor of QPSK/BPSK/MSK Modulation

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 35
Subject
Code Subject Name Teaching Scheme Credits Assigned
Theory Practical Tutor
ial Theory Practical Tutorial Total
ELL504 Professional
Communication
and Ethics -II -- 2 ⃰ + 2
Hours
(Batch -wise) -- -- 02 -- 02
*Theory class to be conducted for full class.

Subject
Code Subject Name Examination Scheme
Theory Marks
Term
Work Pract
ical Oral Total Internal assessment End
Sem.
Exam Exam
duration
Hours Test
1 Test
2 Avg of Test
1 and Test 2
ELL504 Professional
Communication
and Ethics - II -- -- -- -- -- 25 -- 25 50

Course Objectives:

Learners should be able to:
1. Discern and develop an effective style of writing important technical/business documents.
2. Investigate possible resources and plan a successful job campaign.
3. Understand the dynamics of professional communication in the form of group discussions, meetings,
etc. required for career enhancement.
4. Develop creative and i mpactful presentation skills.
5. Analyse personal traits, interests, values, aptitude and skills.
6. Understand the importance of integrity and develop a personal code of ethics

Course Outcomes:

After successful completion of the course students will be able to:

1. Plan and prepare effective business/ technical documents which will in turn provide solid foundation
for their future managerial roles.
2. Strategize their personal and professional skills to build a professional image and meet the demands of
the industry.
3. Emerge successful in group discussions, meetings and result -oriented agreeable solutions in group
communication situations.
4. Deliver persuasive and professional presentations.
5. Develo p creative thinking and interpersonal skills required for effective professional communication.
6. Apply codes of ethical conduct, personal integrity and norms of organizational behavior.

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 36

Module
No. Unit
No. Contents Hrs.
1 ADVANCED TECHNICAL WRITING: PROJECT/PROBLEM BASED LEARNING (PBL) 06
1.1 Purpose and Classification of Reports
Classification on the basis of:
Subject Matter (Technology, Accounting, Finance, Marketing, etc.), Time Interval
(Periodic, One -time, Special), Function (Informational, Analytical, etc.), Physical
Factors (Memorandum, Letter, Short & Long)
1.2 Parts of a Long Formal Report
Prefatory Parts (Front Matter), Report Proper (Main Body), Appended Parts (Back
Matter)
1.3 Language and Style of Reports
Tense, Person & Voice of Reports, Numbering Style of Chapters, Sections, Figures,
Tables and Equations, Referencing Styles in APA & MLA Format, Proof -reading
through Plagiarism Checkers
1.4 Definition, Purpose & Types of Proposals
Solicited (in conformance with RFP) & Unsolicited Proposals, Types (Short and
Long proposals)
1.5 Parts of a Proposal
Elements, Scope and Limitations, Conclusion
1.6 Technical Paper Writing
Parts of a Technical Paper (Abstract, Introduction, Research Methods, Findings and
Analysis, Discussion, Limitations, Future Scope and References), Language and
Formatting, Referencing in IEEE Format
2 EMPLOYMENT SKILLS 06
2.1 Cover Letter & Resume
Parts and Content of a Cover Letter, Difference between Bio -data, Resume & CV,
Essential Parts of a Resume, Types of Resume (Chronological, Functional &
Combination)
2.2 Statement of Purpose
Importance of SOP, Tips for Writing an Effective SOP
2.3 Verbal Aptitude Test
Modelled on CAT, GRE, GMAT exams
2.4 Group Discussions
Purpose of a GD, Parameters of Evaluating a GD, Types of GDs (Normal, Case -
based & Role Plays), GD Etiquette
2.5 Personal Interviews
Planning and Preparation, Types of Questions, Types of Interviews (Structured,
Stress, Behavioral, Problem Solving & Case -based), Modes of Interviews: Face -to-
face (One -to one and Panel) Telephonic, Virtual
3 BUSINESS MEETINGS 02
3.1 Conducting Business Meetings
Types of Meetings, Roles and Responsibilities of Chairperson, Secretary and
Members, Meeting Etiquette
3.2 Documentation
Notice, Agenda, Minutes
4 TECHNICAL/ BUSINESS PRESENTATIONS 02
4.1 Effective Presentation Strategies

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 37
Defining Purpose, Analy zing Audience, Location and Event, Gathering, Selecting
&Arranging Material, Structuring a Presentation, Making Effective Slides, Types of
Presentations Aids, Closing a Presentation, Platform Skills
4.2 Group Presentations
Sharing Responsibility in a Team, Building the contents and visuals together,
Transition Phases
5 INTERPERSONAL SKILLS 08
5.1
Interpersonal Skills
Emotional Intelligence, Leadership & Motivation, Conflict Management &
Negotiation, Time Management, Assertiveness, Decision Making
5.2 Start -up Skills
Financial Literacy, Risk Assessment, Data Analysis (e.g. Consumer Behavior,
Market Trends, etc.)
6 CORPORATE ETHICS 02
6.1 Intellectual Property Rights
Copyrights, Trademarks, Patents, Industrial Designs, Geographical Indications
Integrated Circuits, Trade Secrets (Undisclosed Information)
6.2 Case Studies
Cases related to Business/ Corporate Ethics

Total 26

LIST OF ASSIGNMENTS FOR TERMWORK:
(In the form of Short Notes, Questionnaire/ MCQ Test, Role Play, Case Study, Quiz, etc.)

1. Cover Letter and Resume
2. Short Proposal
3. Meeting Documentation
4. Writing a Technical Paper/ Analyzing a Published Technical Paper
5. Writing a SOP
6. IPR
7. Interpersonal Skills
8. Aptitude test (Verbal Ability)
Note:

1. The Main Body of the project/book report should contain minimum 25 pages (excluding Front
and Back matter).
2. The group size for the final report presentation should not be less than 5 students or exceed 7
students.
3. There will be an end –semester presentation based on the book report.

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 38
GUIDELINES FOR INTERNAL ASSESSMENT

Term Work :
Term work shall consist of minimum 8 experiments.
The distribution of marks for term work shall be as follows:
Assignment : 10 Marks
Attendance : 5 Marks
Presentation slides : 5 Marks
Book Report (hard copy ) : 5 Marks

The final certification and acceptance of term work ensures the satisfactory performance of
laboratory work and minimum passing in the term work.

Internal oral:
Oral Examination will be based on a GD & the Project/Book Report presentation.
Group Discussion :10 marks
Project Presentation :10 Marks
Group Dynamics :5 Marks


Text books and Reference books:

1. Arms, V. M. (2005). Humanities for the engineering curriculum: With selected chapters
from Olsen/Huckin: Technical writing and professional communication, second edition .
Boston , MA: McGraw -Hill.
2. Bovée, C. L., &Thill, J. V. (2021). Business communication today . Upper Saddle River, NJ:
Pearson.
3. Butterfield, J. (2017). Verbal communication: Soft skills for a digital workplace . Boston,
MA: Cengage Learning.
4. Masters, L. A., Wallace, H. R., & Harwood, L. (2011) , Personal development for life and
work . Mason: South -Western Cengage Learning.
5. Robbins, S. P., Judge, T. A., & Campbell, T. T. (2017). Organizational behaviour . Harlow,
England: Pearson.
6. Meenakshi Raman, Sangeeta Sharma (2004) Technical Communication, Principles and
Practice. Oxford University Press
7. Archana Ram (2018) Place Mentor, Tests of Aptitude For Placement Readiness. Oxford
University Press
8. Sanjay Kumar &Pushp Lata (2018). Communication Skills a workbook, New Delhi: Oxford
University Press.

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 39
Subject
Code Subject Name Credits
Assigned
ELM501 Mini project - 2A 02




Course
Code


Course
Name Examination Scheme
Theory Marks Term
Work Practical/
Oral Total

Internal Assessment End
Sem
Exam Exam
duration
Hours
Test 1 Test 2 Avg. of
Test 1 and
Test 2
ELM501 Mini
Project - 2A -- -- -- -- -- 25 25 50

Objectives
1. To acquaint with the process of identifying the needs and converting it into the
problem.
2. To familiarize the process of solving the problem in a group.
3. To acquaint with the process of applying basic engineering fundamentals to
attempt solutions to the problems.
4. To inculcate the process of self -learning and research.

Outcomes:
Learner will be able to;
1. Identify problems based on societal /resea rch needs.
2. Apply knowledge and skill to solve societal problems in a group.
3. Develop interpersonal skills to work as member of a group or leader.
4. Draw the proper inferences from available results through
theoretical/experimental/simulations.
5. Analyze the imp act of solutions in societal and environmental context for sustainable
development.
6. Use standard norms of engineering practices.
7. Excel in written and oral communication.
8. Demonstrate capabilities of self -learning in a group, which leads to life -long learning.
9. Demonstrate project management principles during project work.


Guidelines for Mini Project
 Students shall form a group of 3 to 4 students, while forming a group shall not
be allowed less than three or more than four students, as it is a group activity.
 Students should do survey and identify needs, which shall be converted into
problem statement for mini project in consultation with faculty supervisor/head
of department/internal committee of faculties.
 Major focus of Mini -project 2 shall be towa rds exploration and applicability of
knowledge acquired in the domain areas of DLOs available for the year.

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 40
 Student shall give special consideration to identify and provide solutions to the
burning societal and/or environmental issues which may affect the mankind to
larger extend.
 Students shall submit implementation plan in the form of Gantt/PERT/CPM
chart, which will cover weekly activity of mini project.


A log book to be prepared by each group, wherein group can record weekly work progress,
guide/sup ervisor can verify and record notes/comments.

 Faculty supervisor may give inputs to students during mini project activity; however,
focus shall be on self - learning.
 Students in a group shall understand problem effectively, propose multiple solution
and select best possible solution in consultation with guide/supervisor.
 Students shall convert the best solution into working model using various
components of their domain areas and demonstrate.
 The solution to be validated with proper justification and repo rt to be compiled in
standard format of University of Mumbai.
 With the focus on the self -learning, innovation, addressing societal problems and
entrepreneurship quality development within the students through the Mini Projects,
it is preferable that a sing le project of appropriate level and quality to be carried out
in two semesters by all the groups of the students. i.e. Mini Project 1 in semester III
and IV. Similarly, Mini Project 2 in semesters V and VI.
 However, based on the individual students or grou p capability, with the mentor’s
recommendations, if the proposed Mini Project adhering to the qualitative aspects
mentioned above gets completed in odd semester, then that group can be allowed to
work on the extension of the Mini Project with suitable impr ovements/modifications
or a completely new project idea in even semester. This policy can be adopted on
case-to-case basis.

Guidelines for Assessment of Mini Project:
erm Work
 The review/ progress monitoring committee shall be constituted by head of departments of
each institute. The progress of mini project to be evaluated on continuous basis, minimum
two reviews in each semester. In continuous assessment focus shall also be on each
individual student, assessment based on individual’s contribution in group activity, their
understanding and response to questions.

Distribution of Term work marks for both semesters shall be as below;
Marks awarded by guide/supervisor based on lo gbook: 10
Marks awarded by review committee : 10
Quality of Project report : 05
Review/progress monitoring committee may consider following points for assessment
based on either one year or half year project as mentioned in general guidelines.

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 41
One-year project:
In first semester entire theoretical solution shall be ready, including
components/system selection and cost analysis. Two reviews will be conducted based
on presentation given by students group.
 First on identification and finalization of problem
 Second on proposed soluti on for the problem.

In second semester expected work shall be procurement of components/ systems,
building of working prototype, testing and validation of results based on work
completed in an earlier semester.
 First review shall base on readiness of build ing working prototype.
 Second review shall be based on poster presentation -cum-demonstration
of working model in last month of the said semester.

Half -year project:
In this case students’ group shall complete project in all aspects, in a semester,
including;

o Identification of need/problem
o Proposed acceptable solution for the identified problem
o Procurement of components/systems, if any,
o Building a working prototype and testing

The group shall be evaluated twice during the semester by review committee,
mainly look for the progress as;
 First review focus shall be towards identification & selection of problem and
probable solution proposal.
 Second review shall be for implementatio n and testing of solution.
(Innovative/out of box solution)

Assessment criteria of Mini Project.

Mini Project shall be assessed based on following criteria:

1. Quality of survey/ need identification
2. Clarity of Problem definition based on need.
3. Innovativeness in solutions
4. Feasibility of proposed problem solutions and selection of best solution
5. Innovativeness and out of box thinking
6. Cost effectiveness and Societal impact
7. Functional working model as per stated requirements
8. Effective use of skillset s acquired through curriculum including DLOs
9. Effective use of standard engineering practices & norms
10. Contribution of an individual as team member/Leader
11. Feasibility to deploy the solution on large scale
12. Clarity in written and oral communication
In one year, project , first semester evaluation may be based on first six criteria’s and
remaining may be used for second semester evaluation of performance of students in mini -

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 42
project.
In case of half year project all criteria’s in generic may be considered for performance
evaluation of students in mini -project.


Guidelines for Assessment of Mini Project Practical/Oral Examination:

Report should be prepared as per the guidelines issued by the University of Mumbai. Mini
Project shall be assessed through a presentation and demonstration of working model by the
student project group to a panel of Internal and External Examiners preferably from industry
or research organizations, having experience of more than five years approved by head of
the Institute.

Students shall be motivated to publish a paper based on the work in Conferences/students
competitions.

Mini Project shall be assessed by team of external & internal examiner at the end of
semester/year. Performance shall be evaluated based on;

1. Quality of pr oblem and Clarity
2. Innovativeness in solutions
3. Cost effectiveness and Societal impact
4. Implementation of working model
5. Effective use of diversified skill -set
6. Effective use of standard engineering practices & norms
7. Contribution of an individuals as a member/ Leader
8. Clarity in written and oral communication

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 43
Program Structure for Third Year Electronics Engineering
UNIVERSITY OF MUMBAI
(With Effect from 2021 -2022 )

Semester VI

Course
Code
Course Name Teaching Scheme
(Contact Hours)
Credits Assigned
TH PR Tut TH Pract . Tut Total
ELC601 Basic VLSI Design 3 -- -- 3 -- -- 3
ELC602 Electromagnetic Engineering 3 -- 3 -- 3
ELC603 Computer Communication Networks 3 -- -- 3 -- -- 3
ELC604 Embedded Systems and Real Time
Operating Systems 3 -- -- 3 -- -- 3
ELDO601 Department Optional Course - II 3 -- -- 3 -- -- 3
ELL601 Basic VLSI Design Lab -- 2 -- -- 1 -- 1
ELL602 Computer Communication Networks
Lab -- 2 -- -- 1 -- 1
ELL603 Embedded Systems and Real Time
Operating Systems Lab -- 2 -- -- 1 -- 1
ELL604 Database Management Systems Lab -- 4 -- -- 2 -- 2
ELM601 Mini Project –2 B -- 4$ -- -- 2 -- 2
Total 15 14 -- 15 07 -- 22
$ indicates workload of Learner (Not Faculty), for Mini Project
Course
Code Course Name Examination Scheme
Internal
Assessment End
Sem.
Exam Exam.
Duration
(in Hrs) TW Pract/
Oral Total
Test
1 Test
2 Avg.
ELC601 Basic VLSI Design 20 20 20 80 3 -- -- 100
ELC602 Electromagnetic Engineering 20 20 20 80 3 -- -- 100
ELC603 Computer Communication Networks 20 20 20 80 3 -- -- 100
ELC604 Embedded Systems and Real Time
Operating Systems 20 20 20 80 3 -- -- 100
ELDO601 Department Optional Course - II 20 20 20 80 3 -- -- 100
ELL601 Basic VLSI Design Lab -- -- -- -- -- 25 25 50
ELL602 Computer Communication Networks Lab -- -- -- -- -- 25 25 50
ELL603 Embedded Systems and Real Time
Operating Systems Lab -- -- -- -- -- 25 25 50
ELL604 Database Management Systems Lab -- -- -- -- -- 50 -- 50
ELM601 Mini Project –2 B -- -- -- -- -- 25 25 50
Total 100 400 -- 150 100 750
Department Level Optional Cou rse - I (ELDO 6 01):
1. Digital Control System 3. Machine Learning
2. Digital Image Processing and Machine Vision 4. Digital Design with Reconfigurable Architecture

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 44

Subject
Code Subject Name Teaching Scheme Credits Assigned
Theory Practical Tutorial Theory Practical Tutorial Total
ELC601 Basic VLSI
Design 03 - -- 03 - -- 03


Subject
Code Subject
Name Examination Scheme
Theory Marks
Term
Work Practical Oral Total Internal assessment
End
Sem.
Exam Exam
duration
Hours Test
1 Test
2 Avg of
Test 1
and
Test 2
ELC601 Basic
VLSI
Design 20 20 20 80 03 -- 100




Course Pre -requisite:
1. Electronics Devices and circuits – I (ELC302)
2. Digital Logic Circuits(ELC303)
3. Electronics Devices and Circuits – II (ELC402)

Course Objectives:

1. To understand VLSI Design flow and technology trends.
2. To realize MOS based circuits using different design styles.
3. To study semiconductor memories using MOS logic.
4. To study adder, multiplier and shifter circuits for realizi ng data path design.

Course Outcomes:
After successful completion of the course students will be able to:

1. Demonstrate a clear understanding of VLSI Design flow, technology trends, scaling and
MOSFET models.
2. Design and analyze MOS based inverters.
3. Understand different MOS circuit design styles.
4. Apply design styles for realization of Combinational and Sequential Circuits
5. Understand various semiconductor memories using MOS logic
6. Design adder, multiplier and shifter circuits using MOS logic

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 45





Module
No. Unit
No. Contents Hrs.
1 VLSI Design flow and Technology Trends 06
1.1 VLSI Design Flow: Full custom and Semicustom IC design flow
1.2 MOSFET Scaling: Types of scaling, comparison of MOSFET Model levels,
MOSFET capacitances, interconnect scaling and crosstalk
1.3 Technology Comparison: Comparison of BJT and MOS technologies
2 MOSFET Inverters 08
2.1 Introduction to MOS inverters: Active and passive load nMOS inverters, CMOS
inverter and their comparison
2.2 Static Analysis of Resistive nMOS and CMOS Inverters: Calculation of critical
voltages and noise margins
2.3 Design of symmetric CMOS inverter
2.4 Dynamic Analysis of CMOS inverter : Calculation of rise time, fall time and
propagation delay
2.5 Various components of power dissipation in CMOS circuits
3 MOS Circuit Design Styles 05
3.1 Static: Static CMOS, Pass transistor, Transmission gate, Pseudo NMOS design
styles
3.2 Dynamic: C2MOS, Dynamic, Domino, NORA and Zipper design styles
4 Combinational and Sequential Circuit Realization 08
4.1 Analysis and design of 2 -I/P NAND, 2 -I/P NOR and complex Boolean function
realisation using equivalent CMOS inverter for simultaneous switching
4.2 Complex Boolean function realisation using various design styles
4.3 Basic gates and MUX realisation using pass transistor and transmission gate
logic
4.4 SR Latch, JK FF, D FF, 1 Bit Shift Register realisation using CMOS logic
5 Semiconductor Memories 07
5.1 SRAM: 6T SRAM operation, design strategy, read/write circuits, sense
amplifier
5.2 DRAM: 1T DRAM, operation modes, leakage currents, refresh operation,
physical design
5.3 ROM Array: NAND and NOR based ROM array
5.4
Non-volatile read/write memories: Programming techniques for flash
memory, Introduction to advances in non -volatile memories: MRAM,
ReRAM
6 Data Path Design 05
6.1 Adder: CLA adder, MODL, Manchester carry chain
High -speed adders: carry skip, carry select and carry save
6.2 Multipliers and shifte r: Array multiplier and barrel shifter
Total 39

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 46
Text Books:

1. Sung -Mo Kang and Yusuf Leblebici, “CMOS Digital Integrated Circuits Analysis and
Design ” Tata McGraw Hill, Revised 4th Edition.
2. John P. Uyemura, “Introduction to VLSI Circuits and Systems ”, Wiley India Pvt. Ltd.
Reference Books:

1. Jan M. Rabaey, Anantha Chandrakasan and Borivoje Nikolic, “Digital Integrated
Circuits: A Design Perspective ”, Pearson Education, 2 nd Edition
2. Douglas A Pucknell, Kamran Eshraghian, “Basic VLSI Design ”, Prentice Hall of India
Private Ltd.
3. Ivan Sutherlan and Bob Sproull , “Logical Effort: Designing Fast CMOS Circuits ”
4. Etienne Sicard and Sonia Delmas Bendhia, “Basics of CMOS Cell Design ”, Tata
McGraw Hill
5. Neil H. E. Weste, David Harris and Ayan Banerjee, “CMOS VLSI Design: A Circuits
and Systems Perspective ”, Pearson Education
6. David Hodges, Horace Jackson, Resve Saleh , “Analysis and Design of Digital
Integrated Circuits ”, McGraw -Hill, In c.
7. Ashok K. Sharma, “Advanced Semiconductor Memories: Architectures, Designs, and
Applications ”, Wiley Publication
8. Denny D.Tang, Chi -Feng Pai, “Magnetic Memory Technology: Spin‐Transfer‐Torque
MRAM and Beyond ”, Wiley online Library
9. Daniele Ielmini, Rainer Waser, “Resistive Switching: From Fundamentals of
Nanoionic Redox Processes to Memristive Device Applications ”, Wiley online Library


Internal Assessment (IA):
Two tests must be conducted which should cover at least 80% of syllabus. The average marks
of both the test will be considered as final IA marks

End Semester Examination:
1. Question paper will comprise of 6 questions, each of 20 marks.
2. Total 4 questions need to be solved.
3. Question No.1 will be compulsory and based on entire syllabus wherein sub
questions of 2 to 5 marks will be asked.
4. Remaining questions will be selected from all the module

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 47



Subject
Code Subject Name Examination Scheme
Theory Marks Term
Work Practical
and Oral Total
Internal assessment
End
Sem.
Exam Exam
duration
Hours
Test
1 Test
2 Avg of
Test 1
and Test
2
ELC602 Electromagnetic
Engineering 20 20 20 80 3 -- -- 100

Course Pre -requisites:
1. Vector Algebra (ELC301)
2. Engineering Physics
3. Electrical Network Analysis (ELC304)
4. Principles of Communication Engineering (ELC404)

Course Objectives:
1. To provide the basic skills required to understand, develop, and design various engineering applications
involving electromagnetic fields.
2. To lay the foundations of electromagnetism and its practice in modern communications.
3. To provide an introduction to electromagnetic wave transmission through guided media.
4. To provide exposure to global safety standards in electromagnetic interference.

Course Outcomes:

After successful completion of the course students will be able to:
1. Apply vector calculus to sta tic electric and magnetic fields in different engineering situations.
2. Analyze Maxwell’s equation in different forms (differential and integral) and apply them to diverse
engineering problems.
3. Analyze the phenomena of electromagnetic wave propagati on in different media and in applications of
microwave engineering.
4. Analyze the nature of electromagnetic wave propagation through transmission lines.
5. Evaluate and analyze different antenna structures and their applications.
6. Examine the sources of EMI and identify methods to ensure compatibility as per existing standards for
electrical and electronic systems.



Course
Code
Course
Name Teaching Scheme Credits Assigned
Theory Practical
and Oral Tutorial Theory TW/Pra
ctical
and Oral Tutori
al Total

ELC602 Electromagnetic
Engineering
03
--
--
03
--
--
03

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 48
Module
No. Unit
No. Contents Hrs.
1 Basic Laws of Electromagnetic 09
1.1 Qualitative interpretation of Gradient, Divergence and Curl; Coulomb‘s
Law & Electric Field Intensity, Derivation of electric field intensity due to
point, line and surface charges; Electric flux density, Gauss‘s Law and
divergence theorem; Relationship b etween Electric field & Potential.
1.2 Current and current Density, Continuity equation; Electric boundary
conditions; Poisson‘s and Laplace's equation.
1.3 Biot-Savart‘s Law, Ampere‘s Circuital Law, magnetic field intensity of
infinite current element; Magnetic flux density, Concept of magnetic
scalar and vectors potentials; Magnetic boundary conditions.
2 Maxwell’s Equations 06
2.1 Faraday‘s law, concept of transformer and motional electromotive
forces; Displacement current, Ampere’s Law for time -varying fields,
Maxwell’s equations in differential and integral form; Concept of time
varying potentials, Lorentz gauge conditions.
2.2 Concept of phasors and time harmonic fields.
3
Electromagnetic Waves 06
3.1 Derivation of electromagnetic wave equation, General representation of
EM waves.
3.2 Wave Propagation in Free Space, Lossy and Lossless Dielectrics and in
Good Conductors, Skin Effect, Wave Polarization, Poynting’s Theorem;
Introduction to microwaves as an EM wave application.
4 Transmission Lines 06
4.1 Transmission line parameters, Transmission line equations; Input
impedance, reflection coefficient, standing wave ratio and power.
4.2 Smith Chart, Applications of Smith Chart in finding VSWR, reflection
coefficient, admittance calculations and impedance calculations over
length of line. Applications of Microstrip Lines.
5 Introduction to Antennas 08
5.1 Introduction to antennas and radiation mechanism; Basic antenna
parameters: Radiation pattern, radiation power density, radiation
intensity, HPBW, FNBW, directivity, Antenna radiation efficiency,
Gain, bandwidth, polarization, input impedance, effective le ngth, near
and far field regions; FRIIS transmission equation.
5.2 Far-field radiating fields, radiation resistance and directivity of an
infinitesimal dipole; Comparison between small dipole, finite length
dipole and a half wavelength dipole; Introduction to antenna arrays; linear
array of two isotropic point sources, pr inciple of pattern multiplication;
Qualitative introduction to horn antennas, reflector antennas and
microstrip antennas.
6 Introduction to EMI/EMC 04
Definition of EMI/EMC, introduction to sources and characteristics of
EMI, EMI control techniques like grounding, shielding and filtering. EMC
requirements for electronic systems, a review of MIL -standards, FCC and
CISPR requirements.
Total 39

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 49
Text Books:

1. William H Hayt, John A Buck, Jaleel M. Akhtar, “Engineering Electromagnetics”, 9th ed.,
McGraw -Hill Higher Education, 2020.
2. Matthew N. O. Sadiku, S. V. Kulkarni, “Principles of Electromagnetics”, 6th ed., Oxford
University Press, 2015.
3. R. K. Shevgaonkar, “Electromagnetic Waves”, Tata McGraw Hill, 2005.
4. C. A. Balanis, “Antenna Theory: A nalysis and Design”, 4th ed., John Wiley & Sons, NJ, 2015.
5. W. Prasad Kodali, “Engineering Electromagnetic Compatibility: Principles, Measurements,
Technologies and Computer Models”, 2nd ed., Wiley -IEEE Press, 2001.
6. Clayton R. Paul, “Introduction to Elect romagnetic Compatibility”, John Wiley & Sons, 2nd ed.,
2006.

Reference Books:
1. John D. Kraus, Daniel A. Fleisch, “Electromagnetics: With Applications”, 5th ed., Tata
McGraw Hill, 2010.
2. Joseph Edminister, Mahmood Nahvi, “Schaum's Outline of Electromagneti cs”, 5th ed.,
McGraw Hill, 2018.
3. J. D. Kraus, R. J. Marhefka, A.S. Khan, “Antennas & Wave Propagation”, McGraw Hill
Publications, 5th ed., 2017.
4. R. E. Collin, “Antennas and Radio Wave Propagation”, International Student Edition, McGraw
Hill, 1985.
5. Henry Ott, “Electromagnetic Compatibility Engineering”, Wiley, 2009.

Internal Assessment (IA):

Two tests must be conducted which should cover at least 80% of syllabus. The average marks of both
the test will be considered as final IA marks

End Semester Examination:

1. Question paper will comprise of 6 questions, each of 20 marks.
2. Total 4 questions need to be solved.
3. Question No.1 will be compulsory and based on entire syllabus wherein sub questions of 2 to 5
marks will be asked.
4. Remaining questions will be selected from all the modules

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 50

Subject Code Subject Name Teaching Scheme (Hrs.) Credits Assigned
Theory Practical Tutorial Theory TW/Practical Total
ELC 603
Computer
Communication
and Networks 3 -- -- 3 -- 03

Subject
Code Subject Name Examination Scheme
Theory Marks Term
Work Practical Oral Total
Internal assessment End
Sem.
Exam Test
1 Test
2 Ave. Of
Test 1 and
Test 2
ELC 603
Computer
Communication
and Networks 20 20 20 80 - -- -- 100


Course Pre -requisite: ELC 404 Principles of Communication Engineering
ELC 504 Digital Communication


Course Objectives:
The objectives of this course are to:
1. Introduce networking architecture and protocols.
2. Understand the various layers and protocols in the TCP/IP model.
3. Recognize different addressing schemes, connecting devices and routing protocols.
4. Select the required protocol from the application layer protocols.


Course Outcom es:
On successful completion of the course the students will be able to:
1. Demonstrate understanding of networking concepts and required protocols.
2. Analyze the various layers and protocols of the layered architecture.
3. Evaluate different addressing schemes, connecting devices and routing protocols.
4. Analyze various routing protocols in Network layer.
5. Understand the various protocols in Transport layer
6. Comprehend the different protocols in application layer

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 51
Module
No. Unit
No. Topics Hrs.
1. Introduction to Network Architectures, Protocol Layers, and Service models 04
1.1 Introduction to computer networks and it’s uses. LAN, MAN, WAN Network
topologies
Addressing: Physical / Logical /Port addressing, Protocols and Standards.

1.2 Protocol Architecture: Need of layered protocol architecture, Layers details of OSI,
Protocol Layers and Their Service Models
1.3 TCP/IP Model: Protocol suite, Comparison of OSI and TCP/IP
2. Physical Layer 06
2.1 Transmission Media: Guided media like Coaxial, fiber, twisted pair, and Wireless
media, Transmission Impairments. Interconnecting Devices: Hub, Bridges, Switches,
Router, Gateway
2.2 Introduction to LAN: LAN Protocol architecture
Traditional Ethernet and IEEE 802.3 LAN Standard : Ethernet protocol, Frame
structure, Physical layers: LLC, MAC layers
2.3 Multiplexing: Synchronous TDM, Statistical TDM, ADSL
3. Data Link Control 10
3.1 Data link services: Framing, Flow control, Error control, ARQ methods,
Piggybacking
3.2 High Level Data Link Control (HDLC): HDLC configurations, Frame formats,
Typical frame exchanges.
3.3 Medium Access Control Protocols : ALOHA, Slotted ALOHA, CSMA, CSMA/CD
4.0 Network Layer 10
4.1 Switching : Switched communication networks, Circuit switching networks, Circuit
switching Concepts –Crossbar switch, Time Slot Interchange (TSI), TDM bus
switching, Packet switching principles: Virtual circuit switching and Datagram
switching
4.2 Routing in Packet Switching Networks: Characteristics, Routing strategies, Link
state Routing, Distance vector Routing. Least -Cost Routing Algorithms: Dijkstra’s
Algorithm, Bellman Ford Algorithm.

4.3 Internet Protocol:
Principles of Internetworking: Requirements, Connectionless Operation
Internet Protocol Operation: IP packet, IP address ing - classful and classless,
subnet and supernet addressing, IPv4, IPv6 ( IPv6 Datagram format, comparison
with IPv4, and transition from IPv4 to IPv6)
5.0 Transport Layer 06
5.1 Connection –oriented Transport Protocol Mechanisms: Transmission Control
Protocol (TCP): TCP Services, TCP Header format, TCP three way handshake,
TCP state transition diagram.
Connectionless transport mechanisms: User Datagram Protocol (UDP) - header
5.2 Congestion: Effects of congestion, Congestion control methods, Congestion control
in Packet switching Networks
6.0 Application layer 03
HTTP, FTP, DNS , SMTP, Internet Telephony and Streaming Multimedia
Total 39

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 52
Recommended Text Books
1. William Stallings, “Data and Computer communications”, Pearson Education, 10th
Edition.
2. Behrouz A. Forouzan, “Data communication and networking “, McGraw Hill
Education, Fourth Edition.
3. Alberto Leon Garcia, “Communication Networks”, McGraw Hill Education, Second
Edition

Reference books:

1. S. Tanenbaum, “Computer Networks”, Pearson Education, Fourth Edition.
2. Computer Networking: A Top -Down Approach, by J. F. Kurose and K. W. Ross,
Addison Wesley, 5th Edition.
3. Bhushan Trivedi, “Data Communication and Network”, Oxford Publicati on Press, 1st
edition.


Internal Assessment (IA):
Two tests must be conducted which should cover at least 80% of syllabus. The average marks
of both the test will be considered as final IA marks

End Semester Examination :
1. Question paper will comprise of 6 questions, each carrying 20 marks.
2. Total 4 questions need to be solved.
3. Question No.1 will be compulsory and based on entire syllabus wherein sub
questions of 2 to marks will be asked.
4. Remaining question will be selected from all the modules.

Note: *Students are encouraged to explore more applications which can be assessed by the
faculty.

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 53



Subject
Code Subject Name Teaching Scheme Credits Assigned
Theory Practical Tutorial Theory Practical Tutorial Total
ELC604
Embedded
Systems and
Real Time
Operating
Systems 03 -- -- 03 -- -- 03


Subject
Code Subject Name Examination Scheme
Theory Marks
Term
Work Practical
and Oral Oral Total Internal
assessment
End
Sem.
Exam Exam
duration
Hours Test
1 Test
2 Avg
of
Test
1 and
Test
2
ELC604
Embedded
Systems and
Real
Time Operating
Systems 20 20 20 80 03 -- -- -- 100



Course Pre -requisite:
1. Digital Electronics
2. Basics of Microcontrollers

Course Objectives:
1. To study concepts involved in Embedded Hardware and Software for System realisation.
2. To learn the concepts of modern microcontroller cores like the ARM -Cortex
3. To learn Real -time programming to design time -constrained embedded systems

Course Outcomes:
After successful completion of the course students will be able to:
1. Identify and describe various characteristic features and applications of embedded systems.
2. Analyze and select hardware for embedded system implementation.
3. Evaluate various communication protocols for embedded system implementation.
4. Compare GPOS and RTOS and inves tigate the concepts of RTOS.
5. Evaluate and use various tools for testing and debugging embedded systems
6. Design a system for different requirements based on life -cycle for the embedded system, keeping
oneself aware of ethics and environmental issues.

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 54


Note: Referring to data sheets while selecting Embedded Hardware components must be encouraged.

Module
No. Unit
No. Contents Hrs.
1 Introduction to Embedded Systems
03
1.1 Definition, Characteristics, Classification, Applications
1.2 Design metrics of Embedded system and Challenges in optimization of metrics
2 Embedded Hardware Elements 13
2.1 Features of Embedded cores - µC, ASIC, ASSP, SoC, FPGA, RISC and CISC cores.
Types of memories.
2.2 Case Study: ARM Cortex -M3 Features, Architecture, Programmer’s model, Special
Registers, Operating Modes and States, MPU, Memory map and NVIC.
2.3 Low power - Need and techniques. Case study of Low Power modes in Cortex -M3.
2.4 Communication Interfaces: Comparative study of Serial communication
Interfaces -RS-232, RS -485, SPI, I2C, CAN, USB (v2.0), Bluetooth, Zig -Bee.
(Frame formats of above protocols are not expected)
2.5 Selection Criteria of Sensors and Actuators
3 Embedded Software 12
3.1 Program Modelling concepts: DFG, CDFG, FSM.
3.2 Real-time Operating system: Need of RTOS in Embedded system software
and comparison with GPOS. Task, Task states, Multi -tasking, Task scheduling, and
algorithms -Preemptive SJF, Round -Robin, Priority, Rate Monotonic Scheduling,
Earliest Deadline First
Inter -process communicat ion: Message queues, Mailbox, Event timers.
Task synchronization: Need, Issues - Deadlock, Race condition, live Lock, Solutions
using Mutex, Semaphores.
Shared Data problem, Priority inversion.
4 Introduction to FreeRTOS 03
FreeRTOS Task Management features, Resource Management features, Task
Synchronization features, Event Management features, Calculation of CPU
Utilization of an RTOS, Interrupt Management features, Time Management features.
5 Testing and Debugging Methodology 02
5.1 Testing & Debugging: Hardware testing tools, Boundary -scan/JTAG interface
concepts, Emulator.
5.2 Software Testing tools, Simulator, Debugger. White -Box and Black -Box testing.
6 System Integration (Case Studies) 06
6.1 Embedded Product Design Life -Cycle (EDLC) - Waterfall Model
6.2 Hardware -Software Co -design
6.3 Case studies for Automatic Chocolate Vending Machine, Washing Machine, Smart
Card, highlighting
i) Specification requirements (choice of components),
ii) Hardware architecture
iii) Software architecture
Total 39

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 55
Text Books:
1. Dr. K.V. K. K. Prasad, “Embedded Real Time System: Concepts, Design and
Programming”, Dreamtech, New Delhi, Edition 2014.
2. Rajkamal, “Embedded Systems: Architecture, Programming and Design”, McGraw Hill
Education (India) Private Limited, New Delhi, 2015, Edition 3rd.
3. SriramIyer, Pankaj Gupta,“ Embedded Real Time Systems Programming”, Tata
McGraw Hill Publishing C ompany ltd., 2003.
4. Joseph Yiu,“The Definitive guide to ARM CORTEX -M3 & CORTEX -M4 Processors”,
Elsevier, 2014, 3rd Edition.
5. www.freertos.org

Reference Books:
1. David Simon, “An Embedded Software Primer”, Pearson, 2009.
2. Jonathan W. Valvano, “Embedded Microcomputer Systems – Real Time Interfacing”,
Publisher - Cengage Learning, 2012 Edition 3rd.
3. Andrew Sloss, Domnic Symes, Chris Wright, “ARM System Developers Guide
Designing and Optimising System Software”, Elsevier, 2004
4. Frank Vahid, Tony Givargis, “Emb edded System Design – A Unified
Hardware/Software Introduction”, John Wiley & Sons Inc., 2002.
5. Shibu K V, “Introduction to Embedded Systems”, Tata McGraw Hill Education Private
Limited, New Delhi, 2009.




Internal Assessment (IA):
Two tests must be conducted which should cover at least 80% of syllabus. The average
marks of both the test will be considered as final IA marks

End Semester Examination:
1. Question paper will comprise of 6 questions, each of 20 marks.
2. Total 4 questions need to be solved.
3. Question No.1 will be compulsory and based on entire syllabus wherein sub
questions of 2 to marks will be asked.
4. Remaining questions will be selected from all the module

Page 60

Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 56

Course
Code
Course
Name Teaching Scheme Credits Assigned
Theory Practical
and
Oral Tutorial Theory TW/Practical
and Oral Tutorial Total

ELDO601 Digital
Control
Systems
03
--
--
03
--
--
03

Subject
Code Subject
Name Examination Scheme
Theory Marks Term
Work Practical and
Oral Total
Internal assessment
End
Sem.
Exam Exam
duration
Hours
Test
1 Test
2 Avg of
Test 1
and Test
2
ELDO601 Digital
Control
Systems 20 20 20 80 03 -- -- 100


Course Objectives:

1. To develop the understanding of fundamental principles of di gital control systems.
2. To disseminate the concept of stability and its assessment for discrete -time linear systems.
3. To introduce Z -transform methods and digital controller design.
4. To develop modern state -space methods in digital control systems design.

Course Outcomes:

After successful completion of the course students will be able to:
1. Employ sampling and reconstruction of analog signals.
2. Derive discrete -time models of physical systems.
3. Evaluat e the stability of digital control systems in time and frequency domain.
4. Design performance specification based digital controller for a given system.
5. Analyse the digital control systems using state -space methods and design digital state feedback
controllers .

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 57
Module
No. Unit
No. Contents Hrs.
1 Fundamentals of discrete -time signals and discretization 06
1.1 Why study digital control systems? Advantages and limitations,
comparison of continuous and discrete data control, block diagram
of digital control system.
1.2 Impulse sampling, Nyquist -Shannon sampling theorem,
reconstruction discrete -time signals (Ideal filter).
1.3 Realizable reconstruction methods (ZOH and FOH), transfer
functions of ZOH and FOH.
2 Modelling of Digital Control Systems 06
2.1 Discretization approaches: Impulse invariance, step invariance,
bilinear transformation, finite -difference approximation of
derivative.
2.2 Starred Laplace transform, Pulse transfer function and general
procedures to obtain pulse transfer function.
3 Stability Analysis and Digital Controller Design 10
3.1 Mapping between s -plane and z -plane. stability analysis of digital
systems in z-plane.
3.2 Transient and steady -state analysis of time response.
3.3 Digital controller design using the root -locus method; digital PID
controller; deadbeat controller.
3.4 Realization of digital controllers: direct programming, standard
programming, series programming, parallel programming ladder
programming.
4 State -space Analysis of Discrete -time Systems 09
4.1 Discretization of continuous -time state-space solution and discrete -
time state -space model. Representation of difference equation to
state-space.
4.2 Canonical forms for state -space representation and similarity
transformations.
4.3 Solution of discrete -time state -space equation. Computation of
state-transition matrix (z -transform, Caley -Hamilton theorem,
Diagonalization)
5 Controller Design in State -space 08
5.1 Concept of controllability, distinction between reachability and
controllability, digital controller design using pole-placement
methods (similarity transform, Ackerman’s formula)
5.2 Concept of observability, distinction between detectability and
observability in discrete -time systems.
5.3 Observer design (prediction and current observer), output
feedback controller, introduction to separation principle.
Total 39

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 58
Text Books:
1. Katsuhiko Ogata, “Discrete -time Control Systems”, 2nd edition, Pearson Education,
1995.
2. M. Gopal, “Digital Control and State Variable Methods”, Tata McGraw Hill, 4th
edition, 2012.
Reference Books:
1. Gene Franklin, J David Powell, Michael Workman, “Digital Control of Dynamic
Systems”, Addison Wesley, 3rd edition, 1998.
2. B. C. Kuo, “Digital Control Systems”, Oxford University Press, 2nd edition, 2010.


Internal Assessment (IA):

Two tests must be conducted which should cover at least 80% of syllabus. The average marks
of both the test will be considered as final IA marks

End Semester Examination:
1. Question paper will consist of 6 questions, each of 20 marks.
2. Total 4 questions need to be solved.
3. Question No.1 will be compulsory and based on entire syllabus wherein sub questions
of 2 to 5 marks will be asked.
4. Remaining questions will be selected from all the modules

Note: Students are encouraged to take case study of real life applications.

Page 63

Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 59

Course
Code
Course
Name Teaching Scheme Credits Assigned
Theory Practical
and
Oral Tutorial Theory TW/Practical
and Oral Tutorial Total
ELDO601 Digital
Image
Processing
and
Machine
Vision 03 -- -- 03 -- -- 03

Subject
Code Subject Name Examination Scheme
Theory Marks Term
Work Practical
and Oral Total
Internal assessment
End
Sem.
Exam Exam
duration
Hours
Test
1 Test
2 Avg of
Test 1
and Test
2

ELDO601 Digital Image
Processing and
Machine Vision 20 20 20 80 3 -- -- 100

Pre-requisites:
A student has to understood following subjects before learning this subject:
1. Engineering Mathematics – III (ELC301)
2. Engineering Mathematics – IV (ELC401)
3. Digital Signal Processing (ELC502)

Course Objectives:
1. To learn the fundamental concepts of image processing for image enhancement.
2. To learn image compression, segmentation techniques with practical applications.
3. To provide basic concepts of machine vision and applicatio n development.

Course Outcomes:
After successful completion of the course students will be able to:
1. Represent and interpret image in its numeric and graphical form.
2. Perform different image enhancement approaches for improving image quality.
3. Elucidate the mathematical modelling of image segmentation.
4. Apply the concept of image compression.
5. Understand machine vision system elements.
6. Develop a machine vision system based on requirement.

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 60
Module
No. Unit
No. Contents Hrs.
1 Digital Image Processing Fundamentals 04
1.1 Introduction: Background, Representation of a Digital Image, Fundamental
Steps in Image Processing, Elements of a Digital Image Processing System.
1.2 Digital Image Fundamentals: Elements of Visual Perception, A Simple Image
Model, Two dimensional Sampling and Quantization, Tonal and Spatial
Resolutions, Image File Formats: BMP, TIFF and JPEG. RGB Color model.
2 Enhancement in Spatial and Frequency Domain 09
2.1 Enhancement in the spatial domain: Some Simple Intensity
Transformations, Histogram Processing, Image Subtraction, Image
Averaging.
2.2 Spatial domain filters: Smoothing Filters, Sharpening Filters, High boost
filter, 2D -DFT/FFT of an image, Frequency domain image enhancement
techniques.
3 Image Segmentation and Morphological Operations 10
3.1
Detection of Discontinuities, Edge Linking using Hough Transform,
Thresholding, Region based image segmentation, split and merge techniques.
Image Representation and Description, Chain Code, Polygonal
Representation.
3.2 Binary Morphological Operators, Dilation and Erosion, Opening and Closing,
Hit-or-Miss Transformation , Thinning and Thickening.
4 Image Compression 05
Fundamentals: Coding Redundancy, Inter -pixel Redundancy, Psycho visual
Redundancy Lossless Compression Techniques: Run Length Coding,
Huffman Coding, Lossy Compression Techniques: Predictive Coding,
Improved Gray Scale Quantization, Transform Coding, JPEG Standard.
5 Machine Vision Basics 04
Introduction, definition, Active vision system, Machine vision
components, hardware’s and algorithms, Image Feature Extraction.
6 Machine Vision Applications in Industry 07
Machine Vision for Industrial Applications, Low Angle Metal Surface
(Crosshead) Inspection, Machine Vision System for Quality Grading of
Painted Slates, Inspecting Glass Bottles and Jars, Stemware Inspection
System, Glass Thickness Measurement Using Morphology, Inspecting Food
Products.
Total 39

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 61
Text Books:
1. Rafel C. Gonzalez and Richard E. Woods, ‘Digital Image Processing’, Pearson Education
Asia, Third Edition.
2. Anil K. Jain, “Fundamentals and Digital Image Processing”, Prentice Hall of India Private
Ltd, Third Edition.
3. Bruce G. Batchelor (Ed.), “Machine Vis ion Handbook”, Springer, 1st Edition.
4. Peter Corke, “Robotics, Vision and Control”, Springer, 1st Edition.

Reference Books:
1. S. Jayaraman, E.Esakkirajan and T. Veerkumar, “Digital Image Processing”
TataMcGraw Hill Education Private Ltd, 2009.
2. Milan Sonka, V aclav Hlavac, and Roger Boyle, “Image Processing, Analysis, and
Machine Vision”, Second Edition, Thomson Learning, 2001.
3. Zeuch, Nello, “Understanding and Applying Machine Vision”, CRC Press; 2nd edition.
4. Bershold Klaus, Paul Holm, “Robot vision”, The MIT press.
Internal Assessment (IA):

Two tests must be conducted which should cover at least 80% of syllabus. The average marks of
both the tests will be considered as final IA marks.

End Semester Examination:
1. Question paper will consist of 6 questions, each of 20 marks.
2. Total 4 questions need to be solved.
3. Question No.1 will be compulsory and based on entire syllabus wherein sub questions of
2 to 5 marks will be asked.
4. Remaining questions will be selected from all the modules.

Page 66

Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 62

Subject
Code Subject Name Teaching Scheme Credits Assigned
Theory Practical Tutorial Theory Practical Tutorial Total
EDL O601 Machine Learning 03 - -- 03 - -- 03

Subject
Code Subject
Name Examination Scheme
Theory Marks
Term
Work Practi
cal Oral Total Internal assessment End
Sem.
Exam Exam
duration
Hours Test
1 Test
2 Avg of Test 1
and Test 2
EDL O601 Machine
Learning 20 20 20 80 03 -- -- -- 100


Course Pre -requisite:
1. Linear algebra, multivariate calculus, and probability theory
2. Neural Networks
3. Knowledge of a programming language (PYTHON/C/C ++/ MATLAB recommended)

Course Objectives:
1. Apply Machine Learning techniques in real life applications.
2. Understanding natu re of problems solved with Machine Learning.
3. Understand learning process by human and Machine learning algorithms.

Course Outcomes:
After successful completion of the course students will be able to:
1. Develop Machine Learning Techniques which can be used in real world scenario.
2. Comprehend regression, classification that are used in machine learning.
3. Apply different Dimensionality reduction and clustering methods that are used in machine learning.
4. Analyze Dimensionality reduction techniques.
5. Uunderstand the working of Probabilistic models
6. Demonstrate understanding to real life problems

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics Engineering (Rev. 2019 'C' Scheme)
UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 63











Module
No. Unit
No. Contents Hrs.
1 Introduction to Machine Learning





4

1.1 What is Machine Learning? Why Machine Learning?
1.2 Examples of Machine Learning Problems, Structure of Learning, Issues in
Machine Learning
1.3 Applications of Machine Learning
1.4 How to choose Right Algorithm, Steps in Developing a Machine Learning
Application
1.5 Machine learning Models: Geometric Models, Logical Models, Probabilistic
Models. Features: Feature types, Feature Construction and Transformation,
Feature Selection
2 Classification and Regression 8
2.1 Binary Classification, assessing classification performance, Multi -class
Classification
2.2 Linear regression, Logistic regression, Multi -class regression , Assessing
performance of Regression - Error measures
3 Supervised Learning 8
3.1 Using Decision Trees, Constructing Decision Trees, Ranking and Probability
estimation Trees, Classification and Regression Trees (CART)
3.2 Bayesian Logistic Regression, Naive Bay’s classifier, Bayesian Belief
Networks
4 Unsupervised learning 8
4.1 Dimensionality Reduction: Dimensionality Reduction Techniques, Principal
Component Analysis (PCA)
4.2 K-means Clustering, Hierarchical Clustering, Expectation Maximization
Algorithm, Supervised Learning after Clustering
5 Learning Models 8
5.1
Support Vector Machines, Maximum Margin Linear Separator
5.2
Quadratic Programming Solution to finding maximum margin separators,
Kernels for learning non -linear functions
6 Case Studies In Machine Learning 3
Retail store sales prediction, Credit card Fraud detection (anomaly detection),
healthcare , Telecommunications - Customer churn prediction
Total 39

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Text Books:

1. Peter Flach, “ Machine Learning: The Art and Science of Algorithms that Make Sense
of Data ”, Cambridge University Press .
2. Hastie, Tibshirani, Friedman, “ Introduction to Statistical Machine Learning with
Applications in R ”, Springer, 2nd Edition , 2012
3. Peter Harrington , “Machine Learning In Action”, DreamTech Press.

Reference Books:
1. Ethem Alpaydin, “Introduction to Mac hine Learning”, PHI 2nd Edition, 2013
2. C. M. Bishop, “ Pattern Recognition and Machine Learning ”, Springer , 1st Edition,
2013

Internal Assessment (IA):

Two tests must be conducted which should cover at least 80% of syllabus. The average marks
of both the test will be considered as final IA marks

End Semester Examination:
1. Question paper will comprise of 6 questions, each of 20 marks.
2. Total 4 questions need to be solved.
3. Question No.1 will be compulsory and based on entire syllabus wherein sub questions
of 2 to 5 marks will be asked.
4. Remaining questions will be selected from all the modules

Note: *Students are encouraged to explore more applications which can be assessed by the
faculty.

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Subject
Code Subject Name Teaching Scheme Credits Assigned
Theory Practical Tutorial Theory Practical Tutorial Total
ELDO601 Digital Design
with
Reconfigurable
Architecture 03 -- -- 03 -- -- 03


Subject
Code Subject Name Examination Scheme
Theory Marks
Term
Work Practical Oral Total Internal
assessment
End
Sem.
Exam Exam
duration
Hours Test
1 Test
2 Avg
of
Test
1
and
Test
2

ELDO
601 Digital Design
with
Reconfigurable
Architecture 20 20 20 80 03 -- -- -- 100




Course Pre -requisite:
Digital Logic Circuits (ELC303)

Course Objectives:
1. To understand, analyze & design finite state machines (FSM)
2. To train students in writing VHDL code of combinational & sequential circuits
3. To prepare students to design FSM using hardware description languages (HDL)
4. To motivate students to use reconfigurable devices for digital systems.


Course Outcomes:
After successful completion of the course students will be able to:
1. Analyze & design FSM.
2. Understand fundamentals of HDL and its use for designing combinational circuits.
3. Apply the concept of HDL for designing sequential circuits.
4. Develop FSM by using the fundamentals of HDL.
5. Design of complex digital systems.
6. Understand and distinguish FPGA and CPLD architecture.

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Text Books:
1. M. Morris Mano,”Digital Design”, 5th Edition, Pearson Education India, 2012.
2. John Wakerley, “Digital Design Principles & Practices” Pearson Publication, 3rd
edition.
3. Volnei A. Pedroni, “Circuit Design with VHDL” MIT Press, 2004.
4. Wayne Wolf, “FPGA Based System Design” Pearson Education.
5. W. I. Fletcher, “Engineering Approach to Digital Design” PHI publications.


Reference Books:
1. R. P. Jain, “Modern Digital Electronics”, 4th Edition, McGraw Hill Education, 2016.
2. Stephen Brown, Zvonko Vranesic, “Fundamentals of Digital Logic Design” McGraw
Hill, 2nd edition.
3. John M. Yarbrough, Digital Logic Applications and Design, Thomson Publications,
2006.
4. P. J. Ashenden, “The students guide to VHDL” Elsevier,1999.
5. Xilinx online resources – www.xilnix.com
Module
No. Unit
No. Contents Hrs.
1 State Machines Design 8
1.1 Mealy and Moore machines, Clocked synchronous state machine design, State
reduction techniques, State assignment, Clocked synchronous state machine
analysis.
1.2 Design examples on overlapping and non -overlapping sequence detector,
Odd/even parity checker for serial data, vending machines.
2 Introduction to VHDL 8
2.1
Core features of VHDL, Data types, Concurrent and Sequential statements, Data
flow, Behavioral and Structural architectures, Subprograms: Function and
Procedure.
2.2 Design examples of combinational circuits like Multiplexers, De -multiplexers,
Adder, Subtractor, Priority Encoder
3 Design of sequential circuit using VHDL 6
3.1 Design examples for Flip flops, Synchronous counters, Asynchronous counters,
Shift registers
4 Design of Finite State Machines (FSM) using VHDL 6
4.1 VHDL code for Moore, Mealy type FSMs, Serial adders, Traffic light controller,
Vending machines.
5 System Design using VHDL 6
5.1
Parallel Multiplication, Booth Multiplication, MAC unit, ALU, Memory: ROM
and RAM
6 Simulation, Synthesis and Implementation 5
6.1 Functional simulation, Timing simulation, Logic synthesis, RTL.
6.2 CPLD, SRAM based FPGA architecture, Spartan II.
Total 39

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Internal Assessment (IA):
Two tests must be conducted which should cover at least 80% of syllabus. The average
marks of both the test will be considered as final IA marks.

End Semester Examination:
1. Question paper will comprise of 6 questions, each of 20 marks.
2. Total 4 questions need to be solved.
3. Question No.1 will be compulsory and based on entire syllabus wherein sub
questions of 2 to 5 marks will be asked.
4. Remaining questions will b e selected from all the module.

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Subject
Code Subject Name Teaching Scheme Credits Assigned
Theory Practical Tutorial Theory Practical Tutorial Total
ELL601 Basic VLSI Design
Lab 02 -- - 01 -- 01

Subject
Code Subject
Name Examination Scheme
Theory Marks
Term
Work Practical Practical
& Oral Total Internal assessment
End
Sem.
Exam Exam
duration
Hours Test
1 Test
2 Avg of
Test 1
and
Test 2

ELL601 Basic
VLSI
Design
Lab
- - - - - 25 -- 25 50

Course Objectives:
1. To acquire SPICE coding / circuit simulators skills for realizing MOS based circuits
2. To compare and analyze performance of various MOS Inverters
3. To implement MOS based combinational and sequential circuits

Course Outcomes:
After successful completion of the course students will be able to:
1. Develop circuits using SPICE / circuit simulators.
2. Design and analyze MOS based inverters.
3. Verify different MOS circuit design styles.
4. Validate functionality of Combinational and Sequential Circuits using different design
styles.
5. Examine various semiconductor memories using MOS logic.
6. Enhance skills of building adder, multiplier and shifter circuits using MOS logic.



Term Work:
At least 10 experiments covering entire syllabus of ELC601 (Basic VLSI Design) should be
set to have well predefined inference and conclusion. The experiments should be student
centric and attempt should be made to make experiments more meaningful, interesting. Use
of different types of circuit simulators / industry standard simulators is enc ouraged.
Experiment must be graded from time to time. The grades should be converted into marks
as per the Credit and Grading System manual and should be added and averaged. The grading
and term work assessment should be done based on this scheme. The fina l certification and
acceptance of term work ensures satisfactory performance of laboratory work and minimum
passing marks in term work. Practical and Oral exam will be based on the entire syllabus.

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Suggested List of Experiments
Sr.
No. Title of the Experiment
1 To write SPICE code for obtaining Transfer Characteristics (Id -Vg) and Output
characteristics (Id -Vd) of enhancement and depletion type nMOS and pMOS
transistors and extract parameter like subthreshold leakage current (I L), thre shold
voltage (V T0) and Subthreshold Swing (SS).
2 To study the impact of MOSFET scaling on the device performance.
3 To study the impact of MOSFET Model parameters in Level1 / Level2 on the drain
characteristics.
4 To study the Voltage Transfer Characteristics (VTC) of resistive Load nMOS
inverter and calculate high and low noise margins by extracting critical voltages.
Also study the impact of variation of load resistance on VTC and hence on the
noise margin.
5 To study the effect of Kr or transistor sizing on the VTC of CMOS inverter using
SPICE simulation.
6 To analyse the transient performance of CMOS inverter.
7 To compare performance of different types of inverters by plotting their VTCs
using SPICE code.
8 To realise the complex Boolean function using different design styles.
9 To realise Basic gates / MUX circuits using Pass transistor /Transmission gate
logic.
10 To realise SR Latch, JK FF, D FF using MOS logic.
11 To realise SRAM /DRAM using MOS logic.
12 To realise adder / multiplier / shifter circuits.
Experiments can be performed using simulation tools such as NGSPICE, LTSPICE, DSCH2,
etc.

Note:
Suggested List of Experiments is indicative. However, flexibility lies with individual course
instructor to design and introduce new, innovative, problem based learning and
challenging experiments, from within the curriculum, so that, the fundamentals and
applications can be explored to give greater clarity to the students and they can be
motivated to think differently.

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Subject
Code Subject Name Examination Scheme
Theory Marks
Term Work Practical
And
Oral Total
Internal assessment
End
Sem.
Exam Exam
duration
Hours
Test
1 Test
2 Avg of
Test 1
and
Test 2
ELL 602 Computer
Communication
Networks Lab -- -- -- -- -- 25 25 50


Course Prerequisite : ELC 404 Principles of Communication Engineering
ELC 504 Digital Communication

Course Objectives:
1. Introduce networking architecture and protocols.
2. Understand the various layers and protocols in the TCP/IP model.
3. Recognize different addressing schemes, connecting devices and routing protocols.
4. Select the required protocol from the application layer protocols.

Course Outcomes:
After successful completion of the course students will be able to:
1. Demonstrate understanding of networking concepts and required protocols.
2. Analyze the various layers and protocols of the layered architecture.
3. Evaluate different addressing schemes, connecting devices and routing protocols.
4. Analyze various routing protocols in Network layer.
5. Understand the various protocols in Transport layer
6. Comprehend the different protocols in application layer

Term Work:

Lab session includes Seven experiments and a case study (Power Point Presentation) on any one of
the suggested topics.
1. The experiments will be based on the syllabus contents.
2. Minimum Seven experiments need to be conducted, out of which at least Four experiments
should be software -based (C/C++, Scilab, MATLAB, LabVIEW, etc).
3. Each student (in groups of 3/4) must present a Case study (Power point Presentation) as a part of
the la boratory work.
4. The topics for Presentation / Case -study may be chosen to be any relevant topic on emerging
technology. (“Beyond the scope of the syllabus”.)

Power point presentation should contain minimum of 15 slides and students should submit a report,
(PPT+REPORT) carry minimum of 10 marks. The term work assessment can be carried out based on the
different tools and the rubric decided by the concerned faculty members and need to be conveyed to the
students well in advance.

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At least 07 experiments cover ing entire syllabus of ELL602 ( CCN Lab ) should be set to have well predefined
inference and conclusion. The experiments should be student centric and attempt should be made to make
experiments more meaningful, interesting. Simulation experiments are also e ncouraged. Experiment must
be graded from time to time. The grades should be converted into marks as per the Credit and Grading
System manual and should be added and averaged.

Each student (in groups of 3/4) must present a Case study (Power point Present ation) as a part of the
laboratory work. The topics for Presentation / Case -study may be chosen to be any relevant topic on
emerging technology (“Beyond the scope of the syllabus”). Power point presentation should contain
minimum of 15 slides and students should submit a report, (PPT+REPORT) carry minimum of 10 marks.

The grading and term work assessment should be done based on this scheme. The final certification and
acceptance of term work ensures satisfactory performance of laboratory work and minimum passing marks
in term work. Practical and Oral exam will be based on the entire syllabus.



Suggested List of Experiments
(Expected percentage of H/w and software experiments should be 60% & 40% respectively)


Sr.
No. Experiment Title
1 Study of transmission media and interconnecting devices of communication networks.
2 Implementation of serial transmission using RS232.
3 Implementing bit stuffing algorithm of HDLC using C/C++.
4 Implementation of Routing protocols using C/C++.
5 Study of NS2 simulation software.
6 Implementation of TCP/UDP session using NS2.
7 Implementation of ARQ methods using NS2.
8 Study of WIRESHARK and analyzing Packet using WIRESHARK.
9 Study and implementation of IP commands.
10 Study of GNS software and implementation of routing protocols using GNS.
All the experiments can be performed using simulation softwares. (Free simulation software Scilab can
be used )


Note:
Suggested List of Experiments is indicative. However, flexibility lies with the individual course
instructor to design and introduce new, innovative and challenging experiments, (limited to
maximum 30% variation to the suggested list) from within the curriculum, so that, the
fundamentals and applications can be explored to give g reater clarity to the students and they
can be motivated to think differently.

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Subject
Code Subject Name Teaching Scheme Credits Assigned
Theory Practical Tutorial Theory Practical Tutorial Total
ELL603 Embedded Systems and Real
Time Operating Systems Lab -- 02 -- -- 01 -- 01



Subject
Code

Subject
Name Examination
Scheme
Theory
Marks
Term
Work
Practical
and
Oral
Total
Internal
assessment End
Sem.
Exam Exam
duration
Hours Test
1 Test
2 Avg of
Test 1
and
Test 2
ELL603 Embedded
Systems and Real
Time Operating
Systems Lab -- -- -- -- -- 25 25 50

Prerequisite: Basics of Microcontroller programming
C programming

Course Objectives: To design and write efficient code for single -tasking and multi -tasking embedded systems

Course Outcomes:
After successful completion of the course students will be able to:
1. Interface various sensors and actuators to embedded cores.
2. Write code using RTOS for multi -tasking Embedded systems
3. Design applications usi ng different embedded cores

Term Work:
At least 10 experiments covering entire syllabus of Embedded Systems and Real Time Operating Systems
(ELC604) should be set to have well predefined inference and conclusion. The experiments should be student
centric and attempt should be made to make experiments more meaningful, interesting. Simulation experiments
are also encouraged. Experiment must be graded from time to time. The grades should be converted into marks
as per the Credit and Grading System manual and should be added and averaged. The grading and term work
assessment should be done based on this scheme. The final certification and acceptance of term work ensures
satisfactory performance of laboratory work and minimum passing marks in term work. Practical and Oral
exam will be based on the entire syllabus.

1. Students must perform the experiments using Simulation as well as in Hardware.
2. Experiments must include a minimum of 3 experiments using FreeRTOS

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List of Experiments

Sr.
No. Experiment Name
1 Interfacing of LEDs /switches with any embedded core. (8051/ARM/STM32, etc)
2 Interfacing of Temperature sensor with any embedded core. (8051/ARM/STM32, etc)
3 Interfacing of LCD/ Seven segment display with any embedded core.
(8051/ARM/STM32, etc)
4 Interfacing of Ultrasonic/Humidity sensor with any embedded core. (8051/ARM/STM32,
etc)
5 Interfacing of a relay with any embedded core. (8051/ARM/STM32, etc)
6 Interfacing of a DC motor (speed and Direction control) with any embedded core.
(8051/ARM/STM32,etc)
7 Interfacing of a stepper motor (to move by a particular angle) with any embedded core.
(8051/ARM/STM32, etc)
8 Implement power management in any embedded core of your choice
9 Implement the I2C communication to connect to DS1307 RTC
10 Porting of FreeRTOS to Arduino/STM32.
11 Write a Program to Create Multiple Tasks and understand the Multitasking capabilities of
RTOS (FreeRTOS).
12 Write a Program to illustrate the Queue Management Features of FreeRTOS.
13 Write a Program to illustrate the Event Management Features of FreeRTOS.
14 Write a Program to illustrate the use of Binary and Counting Semaphore for Task
Synchronization using FreeRTOS.
15 Build a Multitasking Real -Time Applications using the above IPC
Mechanisms (Message Queue, EventGroup, Semaphores) with FreeRTOS on
Arduino/STM32.


Note:
Suggested List of Experiments is indicative. However, flexibility lies with individual course instructors
to design and introduce new, innovative and challenging experiments, (limited to maximum 30%
variation to the suggested list) from within the curriculum, so that the fundamentals and applications
can be explored to give greater clarity to the students and they can be motivated to think differently.

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Code Subject Name Teaching Scheme Credits Assigned
Theory Practical
and Oral Tutorial Theory Practical
and Oral Tutorial Total
ELL604 Database
Management
Systems Lab -- 02*+02 -- -- 02 -- 02
* Theory class to be conducted for full class



Subject
Code

Subject
Name Examination
Scheme
Theory Marks
Term
Work
Practical
and
Oral
Total Internal
assessment End
Sem.
Exam Exam
duration
Hours Test
1 Test
2 Avg of
Test 1
and
Test 2
ELL604 Database
Management
Systems Lab -- -- -- -- -- 50 -- 50


Course Pre-requisites: Any programming language

Course Objectives:

1. To identify, define problem statements and construct conceptual data model for real life
applications.
2. To build Relational Model from conceptual model(ER/EER).
3. To apply SQL to store and retrieve data efficiently.
4. To demonstrate no tions of normalization for database design.

After successfully implementation of the case studies student will acquire following skills:
1. Identify the need of database, and define the problem statement for real life applications.
2. Create relational model for real life applications
3. Formulate query using SQL for efficient retrieval of data.

Syllabus: In order to perform the case studies given below, students must refer the following
modules.

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UNIVERSITY OF MUMBAI, B.E (ELECTRONICS ENGINEERING) 75

Module
No Topics
1 Database System Concepts and Architecture
Introduction, Characteristics of Databases, File system v/s Database system, Data
abstraction and Data Independence, DBMS system architecture, Database Administrator
(DBA), Role of DBA
2 The Entity -Relationship Model
Conceptual Modeling of a database, The Entity -Relationship (ER) Model, Entity Type,
Entity Sets, Attributes and Keys, Relationship Types, Relationship Sets, Weak entity
Types, Generalization, Specialization and Aggregation, Extended Entity -Relationship
(EER) Model.
3 Relational Model & Relational Algebra
Introduction to Relational Model, Relational Model Constraints and Relational Database
Schemas, Concept of Keys: Primary Kay, Secondary key, Foreign Key, Mapping the ER
and EER Model to the Relational Mo del, Introduction to Relational Algebra, Relational
Algebra expressions for Unary Relational Operations, Set Theory operations, Binary
Relational operation
Relational Algebra Queries
4 Structured Query Language (SQL) & Indexing
Overview of SQL, Data Definition Commands, Set operations, aggregate function, null
values, Data Manipulation commands, Data Control commands, Complex Retrieval
Queries using Group By, Recursive Queries, nested queries. Integrity constraints in SQL.
Database Programming with J DBC, Security and authorization: Grant & Revoke in SQL
Functions and Procedures in SQL and cursors. Indexing: Basic Concepts, Ordered
Indices, Index Definition in SQL
5 Relational Database Design
Design guidelines for relational Schema, Functional Dependencies, Database tables and
normalization, The need for normalization, The normalization process, Improving the
design, Definition of Normal Forms - 1NF, 2NF, 3NF & The Boyce -Codd Normal Form
(BCNF).
6 Transactions Management and Concurrency and Recovery
Transaction concept, Transaction states, ACID properties, Transaction Control
Commands, Concurrent Executions, Serializability -Conflict and View, Concurrency
Control: Lock -based, Timestamp -based protocols, Recovery System: Log based
recovery, Deadlock handling


Term Work:
The case study may be chosen on any relevant topic which needs a database as backend. Suggested case
studies are as follows:
1) Company Database Management System
2) University Database Management System
3) Hospital Management System
4) Student Management System
5) Library Management System

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Selected case study may be divided into the following set of experiments.

1. Identify the case study and detail statement of problem. Design an Entity -
Relationship(ER) / Extended Entity -Relationship (EER) Model & Mapping ER/EER to
Relational schema.
2. Create a database using Data Definition Language (DDL) and apply integrity
constra ints for the specified case study.
3. Apply DML commands for the specified system & perform simple queries, string
manipulation operations and aggregate functions.
4. Implement various join operations, nested and complex queries.
5. Implementation of views and tr iggers.
6. Implement procedure and functions
7. Use of database connectivity like JDBC.
8. Deploy the application.

Assignments:

1. Perform Normalization: 1NF, 2NF, 3NF.
2. Privileged database user creation.

Suggested Books:

1. Korth, Slberchatz, Sudarshan, “Database System Concepts ”, 6th Edition, McGraw –
Hill
2. Elmasri and Navathe, “Fundamentals of Database Systems ”, 5th Edition, Pearson
3. Peter Rob and Carlos Coronel, “Database Systems Design : mplementation and
Management ”, Thomson Learning, 5th Edition.
4. Raghu Ra mkrishnan and Johannes Gehrke, “Database Management Systems ”, TMH

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Course code Course Name Credits
ELM 601 Mini Project 2B 02


Objectives

1. To acquaint with the process of identifying the needs and converting it into the problem.
2. To familiarize the process of solving the problem in a group.
3. To acquaint with the process of applying basic engineering fundamentals to attempt solutions to the
problems.
4. To inculcate the process of self -learning and research.

Outcome:
Learner will be able to…

1. Identify problems based on societal /research needs.
2. Apply Knowledge and skill to solve societal problems in a group.
3. Develop interpersonal skills to work as member of a group or leader.
4. Draw the proper inferences from availa ble results through theoretical/ experimental/simulations.
5. Analyze the impact of solutions in societal and environmental context for sustainable development.
6. Use standard norms of engineering practices
7. Excel in written and oral communication.
8. Demonstrate capabilities of self -learning in a group, which leads to life -long learning.
9. Demonstrate project management principles during project work.


Guidelines for Mini Project
 Students shall form a group of 3 to 4 students, while forming a group shall not be allowed less than
three or more than four students, as it is a group activity.
 Students should do survey and identify needs, which shall be converted into problem statement for
mini project in consultation with faculty supervisor/head of department/internal committee of
faculties.
 Students hall submit implementation plan in the form of Gantt/PERT/CPM chart, which will cover
weekly activity of mini project.
 A log book to be prepared by each group, wherein group can record weekly work progre ss,
guide/supervisor can verify and record notes/comments.
 Faculty supervisor may give inputs to students during mini project activity; however, focus shall be
on self -learning.
 Students in a group shall understand problem effectively, propose multip le solution and select best
possible solution in consultation with guide/ supervisor.
 Students shall convert the best solution into working model using various components of their
domain areas and demonstrate.
 The solution to be validated with proper jus tification and report to be compiled in standard format of
University of Mumbai.
 With the focus on the self -learning, innovation, addressing societal problems and entrepreneurship
quality development within the students through the Mini Projects, it is pr eferable that a single project

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of appropriate level and quality to be carried out in two semesters by all the groups of the students.
i.e. Mini Project 1 in semester III and IV. Similarly, Mini Project 2 in semesters V and VI.
 However, based on the indivi dual students or group capability, with the mentor’s recommendations,
if the proposed Mini Project adhering to the qualitative aspects mentioned above gets completed in
odd semester, then that group can be allowed to work on the extension of the Mini Proje ct with
suitable improvements/modifications or a completely new project idea in even semester. This policy
can be adopted on case by case basis.
Guidelines for Assessment of Mini Project:
Term Work
 The review/ progress monitoring committee shall be constit uted by head of departments of each
institute. The progress of mini project to be evaluated on continuous basis, minimum two
reviews in each semester.
 In continuous assessment focus shall also be on each individual student, assessment based on
individual’s contribution in group activity, their understanding and response to questions.
 Distribution of Term work marks for both semesters shall be as below;
o Marks awarded by guide/supervisor based on log book : 10
o Marks awarded by review committee : 10
o Quality of Project report : 05
Review/progress monitoring committee may consider following points for
assessment based on either one year or half year project as mentioned in general
guidelines.


One-year project:
 In first semester entire theoretical sol ution shall be ready, including components/system
selection and cost analysis. Two reviews will be conducted based on presentation given by
students group.
 First shall be for finalization of problem
 Second shall be on finalization of proposed solution of problem.
 In second semester expected work shall be procurement of components/ systems, building of
working prototype, testing and validation of results based on work completed in an earlier
semester.
 First review is based on readiness of building working p rototype to be conducted.
 Second review shall be based on poster presentation cum demonstration of working
model in last month of the said semester.

Half -year project:
 In this case in one semester students’ group shall complete project in all aspects including,
o Identification of need/problem
o Proposed final solution
o Procurement of components/systems
o Building prototype and testing
 Two reviews will be conducted for continuous assessment,
 First shall be for finalization of problem and proposed solution
 Second shall be for implementation and testing of solution.

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Assessment criteria of Mini Project.

Mini Project shall be assessed based on following criteria;
1. Quality of survey/ need identification
2. Clarity of Problem definition based on need.
3. Innovativeness in solutions
4. Feasibility of proposed problem solutions and selection of best solution
5. Cost effectiveness
6. Societal impact
7. Innovativeness
8. Cost effectiveness and Societal impact
9. Full functioning of working model as per stated requirements
10. Effective use of skill sets
11. Effective use of standard engineering norms
12. Contribution of an individual’s as member or leader
13. Clarity in written and oral communication

 In one year, project , first semester evaluation may be based on first six criteria’s and
remaining may be used for second semester evaluation of performance of students in mini
project.
 In case of half year project all criteria’s in generic may be considered for evaluation of
performance of students in mini project.

Guidelines for Assessment of Mini Project Practical/Oral Examination:
 Report should be prepared as per the guidelines issued by the University of Mumbai.
 Mini Project shall be assessed through a presentation and demonstration of working model by the
student project group to a panel of Internal and External Examiners preferably from industry or
research organizations having experience of more than five years approved by head of Institution.
 Students shall be motivated to publish a paper based on the work in Conferences/students
competitions.



Mini Project shall be assessed based on following points;
1. Quality of problem and Clarity
2. Innovativeness in solutions
3. Cost effectiveness and Societal impact
4. Full functioning of working model as per stated requiremen ts
5. Effective use of skill sets
6. Effective use of standard engineering norms
7. Contribution of an individual’s as member or leader
8. Clarity in written and oral communication