## Electronics and Computer Science 1 Syllabus Mumbai University by munotes

## Page 2

Copy for information and necessary action : -

1. The Deputy Registrar, College Affiliations & Development Department

(CAD),

2. College Teachers Approval Unit (CTA),

3. The Deputy Registrar, (Admissions, Enrolment, Eligibility and

Migration Department (AEM),

4. The Deputy Registrar, Academic Appointments & Quality Assurance

(AAQA)

5. The Deputy Registrar, Research Administration & Promotion Cell

(RAPC),

6. The Deputy Registrar, Executive Authorities Section (EA)

He is requested to treat this as action taken report on the concerned

resolution adopted by the Academic Council referred to the above

circular.

7. The Deputy Registrar, PRO, Fort, (Publication Section),

8. The Deputy Registrar, Special Cell,

9. The Deputy Registrar, Fort Administration Department

(FAD) Record Section,

10. The Deputy Registrar, Vidyanagari Administration Department

(VAD),

Copy for information : -

1. The Director, Dept. of Information and Communication Technology

(DICT), Vidyanagari,

He is requested to upload the Circular University Website

2. The Director of Department of Student Development (DSD) ,

3. The Director, Institute of Distance and Open Learning (IDOL Admin),

Vidyanagari,

4. All Deputy Registrar, Examination House,

5. The Deputy Registrars, Finance & Accounts Section,

6. The Assistant Registrar, Administrative sub -Campus Thane,

7. The Assistant Registrar, School of Engg. & Applied Sciences, Kalyan,

8. The Assistant Registrar, Ratnagiri sub -centre, Ratnagiri,

9. P.A to Hon’ble Vice -Chancellor,

10. P.A to Pro -Vice-Chancellor,

11. P.A to Registrar,

12. P.A to All Deans of all Faculties,

13. P.A to Finance & Account Officers, (F & A.O),

14. P.A to Director, Board of Examinations and Evaluation,

15. P.A to Director, Innovation, Incubation and Linkages,

16. P.A to Director, Department of Li felong Learning and Extension (D LLE),

17. The Receptionist,

18. The Telephone Operator,

Copy with compliments for information to : -

19. The Secretary, MUASA

20. The Secretary, BUCTU.

## Page 3

AC – 28/12/2021

Item No. - 6.9

UNIVERSITY OF MUMBAI

Bachelor of Engineering

(Electronics and Computer Science )

Direct Second Year (Sem. III) Admitted Students for the

current Academic Year 2021 -22 Only due to Covid

Pandemic

(REV - 2019 ‘C’ Scheme) from Academic Year 2019 – 20

Under

FACULTY OF SCIENCE & TECHNOLOGY

## Page 4

Programme Structure for Bachelor of Engineering (B.E.) – Electronics and Computer Science

(Rev. 2020)

UNIVERSITY OF MUMBAI, B.E. (ELECTRONICS AND COMPUTER

SCIENCE), REV 2020 2

Preamble

To meet the challenge of ensuring excellence in engineering education, the issue of quality needs to

be addressed, debated and taken forward in a systematic manner. Accreditation is the principal means

of quality assurance in higher education. The major emphasis of accreditation process is to measure

the outcomes of the progr am that is being accredited. In line with this, the Faculty of Science and

Technology (in particular Engineering), of University of Mumbai, has taken a lead in incorporating

the philosophy of outcome -based education in the process of curriculum development .

Faculty resolved that course objectives and course outcomes are to be clearly defined for each course,

so that all faculty members in affiliated institutes, understand the depth and approach of the course to

be taught, which will enhance learner’s learning process. Choice based Credit and grading system

enables a much -required shift in focus from teacher -centric to learner -centric education since the

workload estimated is based on the investment of time in learning and not in teaching. It also focus es

on continuous evaluation which will enhance the quality of education. Credit assignment for courses

is based on 15 weeks teaching learning process. However, content of courses is to be taught in 12 -13

weeks and the remaining 2 -3 weeks to be utilized for revision, guest lectures, coverage of content

beyond syllabus etc.

There was a concern that the earlier revised curriculum was more focused on providing information

and knowledge across various domains of the said program, which led to heavily loading st udents in

terms of direct contact hours. In this regard, faculty of science and technology resolved that to minimize the

burden of contact hours, total credits of the entire program will be of 170, wherein focus is not only on providing

knowledge but also on building skills, attitude and self -learning. There -fore in the present curriculum, skill-based

laboratories and mini projects are made mandatory across all disciplines of engineering in second and third year

of programs, which will definitely facilitate self -learning of students. The overall credits and approach of the

curriculum proposed in the present revision is in line with the AICTE model curriculum.

The present curriculum will be implemented for Second Year of Engineering from the academic year

2020 -21. Subsequently this will be carried forward for Third Year and Final Year Engineering in the

academic years 2021 -22, 2022 -23, respectively.

Dr. S. K. Ukarande

Associate Dean

Faculty of Science and Technology

Member, Academic Council, RRC in Engineering

University of Mumbai

## Page 5

Programme Structure for Bachelor of Engineering (B.E.) – Electronics and Computer Science

(Rev. 2020)

UNIVERSITY OF MUMBAI, B.E. (ELECTRONICS AND COMPUTER

SCIENCE), REV 2020 3

Incorporation and implementation of Online Contents from

NPTEL/ Swayam Platform

The curriculum revision is mainly focused on knowledge component, skill based activities and project

based activities. Self learning opportunities are provided to learners. In the revision process this time,

in particular Revised syllabus of ‘C ‘scheme, wherever possible, additional resource links of platforms

such as NPTEL, Swayam are appropriately provided. In earlier revisions of the curriculum in the years

2012 and 2016, in Revised scheme ‘A' and ‘B' respectively, efforts were made to use online contents

as additional learning materials to enhance learning of students.

In the current revision based on the recommendation of AICTE model curriculum, overall credits are

reduced to 171, to provide opportunity of self-learning to learner. Learners are now getting sufficient

time for self -learning either through online courses or additional projects for enhancing their

knowledge and skill sets.

The Principals/ HOD’s/ Faculties of all the institutes are required to motivate and encourage learners

to use additional online resources available on platforms such as NPTEL/ Swayam. Learners can be

advised to take up online courses and on successful completi on, they are required to submit

certification for the same. This will definitely help learners to facilitate their enhanced learning based

on their interest.

Dr. S. K. Ukarande

Associate Dean

Faculty of Science and Technology

Member, Academic Council, RRC in Engineering

University of Mumbai

## Page 6

Programme Structure for Direct Second Year Admitted Students in (B.E.) – Electronics and Computer Science AY2021 -22 only

UNIVERSITY OF MUMBAI, B.E. (ELECTRONICS AND COMPUTER

SCIENCE), REV 2020 4

Program Structure for Second Year Electronics and Computer Science

UNIVERSITY OF MUMBAI

(With Effect from 2020 -2021)

Semester III

Course

Code Course Name Teaching Scheme

(Contact Hours) Credits Assigned

Theory Practical Tutorial Theory Practical Tutorial Total

ECC 301 Engineering Maths III 3 - 1 3 - 1 4

ECC 302 Electronic Devices 3 - - 3 - - 3

ECC 303 Digital Electronics 3 - - 3 - - 3

ECC 304 Data Structures and

Algorithms 3 - - 3 - - 3

ECC 305 Database

Management Systems 3 - - 3 - - 3

ECL301 Electronic Devices

Lab - 2 - - 1 - 1

ECL302 Digital Electronics

Lab - 2 - - 1 - 1

ECL303 Data Structures and

Algorithms Lab - 2 - - 1 - 1

ECL304 Database

Management Systems

lab - 2 - - 1 - 1

ECL305 Skill -based Lab

course: OOPM (C++

and Java) - 4 - - 2 - 2

ECM301 Mini -project -1 A - 4$ - - 2 - 2

Total 15 16 1 15 08 1 24

$ indicates workload of learner (Not faculty), for mini -project

## Page 7

Programme Structure for Direct Second Year Admitted Students in (B.E.) – Electronics and Computer Science AY2021 -22 only

UNIVERSITY OF MUMBAI, B.E. (ELECTRONICS AND COMPUTER

SCIENCE), REV 2020 5

Course

Code

Course

Name Examination

Scheme

Theory Term

Work Practical/

Oral Total

Internal Assessment End

Sem.

Exam Exam.

Duration

(in Hrs) Test1 Test2 Avg

.

ECC 301 Engineering

Maths III 20 20 20 80 03 25 - 125

ECC 302 Electronic

Devices 20 20 20 80 03 - - 100

ECC 303 Digital

Electronics 20 20 20 80 03 - - 100

ECC 304 Data

Structures

and

Algorithms 20 20 20 80 03 - - 100

ECC 305 Database

Management

Systems 20 20 20 80 03 - - 100

ECL 301 Electronic

Devices Lab - - - - - 25 25 50

ECL 302 Digital

Electronics Lab - - - - - 25 25 50

ECL 303 Data

Structures

and

Algorithms

Lab - - -- - - 25 25 50

ECL 304 Database

Management

systems lab - - - - - 25 25 50

ECL 305 Skill -based Lab

course: OOPM

(C++

and Java) - - - - - 50 - 50

ECM 301 Mini Project - 1A 25 25 25

Total - - 100 400 - 200 125 825

## Page 8

Programme Structure for Direct Second Year Admitted Students in (B.E.) – Electronics and Computer Science AY2021 -22 only

UNIVERSITY OF MUMBAI, B.E. (ELECTRONICS AND COMPUTER

SCIENCE), REV 2020 6

Note:

1. Students group and load of faculty per week.

Mini Project 1 and 2:

Students can form groups with minimum 3 (Three) and not more than 4(Four).

Faculty Load : 1 hour per week per four groups

Major Project 1 and2:

Students can form groups with minimum 2 (Two) and not more than 4 (Four)

Faculty Load: In Semester VII– ½ hour per week per project group

In Semester VIII – 1 hour per week per project group

2. Out of 4 hours/week allotted for the mini -projects 1 -A and 1 -B, an expert lecture of at least one

hour per week from industry/institute or a field visit to nearby domain specific industry should

be arranged.

3. Mini -projects 2 -A and 2 -B should be based on DLOs.

## Page 9

Programme Structure for Direct Second Year Admitted Students in (B.E.) – Electronics and Computer Science AY2021 -22 only

UNIVERSITY OF MUMBAI, B.E. (ELECTRONICS AND COMPUTER

SCIENCE), REV 2020 7

Course

Code

Course Name Teaching Scheme Credits Assigned

Theory Practical Tutorial Theory Practical Tutorial Total

ECC 301 Engineering

Maths III 03 -- 01 03 -- 01 04

Course

Code

Course

Name Examination Scheme

Theory Marks

Term

Work

Practical

Oral

Total Internal assessment

End

Sem.

Exam

Exam

duration

Hours

Test

1

Test

2 Avg. of

Test 1

and

Test 2

ECC

301 Engineering

Maths III 20 20 20 80 03 25 -- -- 125

Pre-requisite:

Engineering Mathematics -I, Engineering Mathematics -II, Scalar and Vector Product: Scalar and vector product of

three and four vectors

Course Objectives:

The course is aimed

1. To learn the Laplace Transform, Inverse Laplace Transform of various functions and its applications.

2. To understand the concept of Fourier Series, its complex form and enhance the problem -solving skills.

3. To understand the concept of complex variables, C -R equations, harmonic functions and its conjugate and

mapping in complex plane.

4. To underst and the basics of Linear Algebra.

5. To use concepts of vector calculus to analyze and model engineering problems.

Course Outcomes:

After successful completion of the course students will be able to:

1. Understand the concept of Laplace transform and its application to solve the real integrals in engineering

problems.

2. Understand the concept of inverse Laplace transform of various functions and its applications in engineering

problems.

3. Expand the periodic function by using Fourier series for real life probl ems and complex engineering

problems.

4. Understand complex variable theory, application of harmonic conjugate to get orthogonal trajectories and

analytic function.

5. Use matrix algebra to solve the engineering problems.

6. Apply the concepts of vector calculus in real life problems.

## Page 10

Programme Structure for Direct Second Year Admitted Students in (B.E.) – Electronics and Computer Science AY2021 -22 only

UNIVERSITY OF MUMBAI, B.E. (ELECTRONICS AND COMPUTER

SCIENCE), REV 2020 8

Module

No.

Unit

No.

Contents

Hrs.

1 Laplace Transform 06

1.1 Definition of Laplace transform, Condition of Existence of Laplace transform.

1.2 Laplace Transform (L) of Standard Functions like

and

.

1.3 Properties of Laplace Transform: Linearity, First Shifting theorem, Second Shifting

Theorem, change of scale Property, multip lication by t, Division by t, Laplace Transform

of derivatives and integrals (Properties without proof).

1.4 Evaluation of integrals by using Laplace Transformation.

Self-learning Topics: Heaviside’s Unit Step function, Laplace Transform of Periodic functions,

Dirac Delta Function.

2 Inverse Laplace Transform 06

2.1 Inverse Laplace Transform, Linearity property, use of standard formulae to find inverse

Laplace Transform, finding Inverse Laplace transform using derivatives.

2.2 Partial fractions method to find inverse Laplace transform.

2.3 Inverse Laplace transform using Convolution theorem (without proof).

Self-learning Topics: Applications to solve initial and boundary value problems involving

ordinary differential equations.

3 Fourier Series 06

3.1 Dirichlet’s conditions, Definition of Fourier series and Parseval’s Identity (without

proof).

3.2 Fourier series of periodic function with period 2 𝜋 and 2l.

3.3 Fourier series of even and odd functions.

3.4 Half range Sine and Cosine Series.

Self-learning Topics: Complex form of Fourier Series, Orthogonal and Orthonormal set of

functions. Fourier Transform.

4 Complex Variables 06

4.1 Function f(z) of complex variable, limit, continuity and differentiability of f(z)Analytic

function, necessary and sufficient conditions for f(z) to be analytic (without proof).

4.2 Cauchy -Riemann equations in Cartesian coordinates (without proof).

## Page 11

Programme Structure for Direct Second Year Admitted Students in (B.E.) – Electronics and Computer Science AY2021 -22 only

UNIVERSITY OF MUMBAI, B.E. (ELECTRONICS AND COMPUTER

SCIENCE), REV 2020 9

4.3 Milne -Thomson method to determine analytic function f(z)when real part

(u) or Imaginary part (v) or its combination (u+v or u -v) is given.

4.4 Harmonic function, Harmonic conjugate and orthogonal trajectories

Self-learning Topics: Conformal mapping, linear, bilinear mapping, cross ratio, fixed points

and standard transformations

5 Linear Algebra: Matrix Theory 06

5.1 Characteristic equation, Eigen values and Eigen vectors, Example based on properties

of Eigen values and Eigen vectors. (Without Proof).

5.2 Cayley -Hamilton theorem (Without proof), Examples based on verification of

Cayley - Hamilton theorem and compute inverse of Matrix.

5.3 Similarity of matrices, Diagonalization of matrices. Functions of square matrix

Self-learning Topics: Application of Matrix Theory in machine learning and google page rank

algorithms, derogatory and non -derogatory matrices .

6 Vector Differentiation and Integral 06

6.1 Vector differentiation: Basics of Gradient, Divergence and Curl (Without Proof).

6.2 Properties of vector field: Solenoidal and irrotational (conservative) vector fields.

6.3 Vector integral: Line Integral, Green’s theorem in a plane (Without Proof),

Stokes’ theorem (Without Proof) only evaluation.

Self-learning Topics: Gauss’ divergence Theorem and applications of Vector calculus

Total 36

## Page 12

Programme Structure for Direct Second Year Admitted Students in (B.E.) – Electronics and Computer Science AY2021 -22 only

UNIVERSITY OF MUMBAI, B.E. (ELECTRONICS AND COMPUTER

SCIENCE), REV 2020 10

References:

1. H. K. Das, Advanced Engineering Mathematics, S. Chand Publications, 22nd edition, 2018.

2. B. V. Ramana, Higher Engineering Mathematics, Tata Mc-Graw Hill Publication.1st edition, 2006.

3. R. K. Jain and S. R. K. Iyengar, Advanced Engineering Mathematics, Narosa Publication, 1st

edition, 2006.

4. Wylie and Barret, Advanced Engineering Mathematics, Tata Mc -Graw Hill, 6st edition, 2003.

5. Murray Spiegel, Schaum's Outline of Fourier Analysis with Applications to Boundary Value

Problems (Schaum's Outline Series).

6. Murray Spiegel, Schaum's Outline of Vector Analysis (Schaums' Outline Series), Mc-Graw Hill

Publication.

7. Seymour Lipschutz, Schaum's Outline of Beginning Linear Algebra (Schaums' Outline Series),

Mc-Graw Hill Publication.

8. Dr. B. S. Grewal, Higher Engineering Mathematics, Khanna Publication, 43rd edition, 2010.

Term Work:

General Instructions:

1. Batch wise tutorials are to be conducted. The number of students per batch should be as per

University pattern for practicals.

2. Students must be encouraged to write at least 6 class tutorials on entire syllabus.

3. A group of 4 -6 students should be assigned a self -learning topic. Students should prepare a

presentation/problem solving of 10 -15 minutes. This should be considered as mini project in

Engineering mathematics. This project should be graded for 10 marks depending on the

performance of the students.

4. The distribution of Term Work marks will be as follows –

1. Attendance (Theory and Tutorial) 05 marks

2. Class Tutorials on entire syllabus 10 marks

3. Mini project 10 marks

Internal Assessment (IA):

Two tests must be conducted which should cover at least 80% of syllabus. The average marks of both

the test will be considered as final IA marks.

End Semester Examination:

1. Question paper will comprise of 6 questions, each of 20 marks.

2. Total 4 questions need to be solved.

3. Question No.1 will be compulsory and based on the entire syllabus wherein sub questions of 2 to 5

marks will be asked.

4. Remaining questions will be selected from all the modules.

## Page 13

Programme Structure for Direct Second Year Admitted Students in (B.E.) – Electronics and Computer Science AY2021 -22 only

UNIVERSITY OF MUMBAI, B.E. (ELECTRONICS AND COMPUTER

SCIENCE), REV 2020 11

Course

Code

Course Name Teaching Scheme Credits Assigned

Theory Practical Tutorial Theory Practical Tutorial Total

ECC 302 Electronic

Devices 03 -- -- 03 -- -- 03

Course

Code

Course

Name Examination Scheme

Theory Marks

Term

Work

Practical

Oral

Total Internal assessment

End

Sem.

Exam

Exam

duration

Hours

Test

1

Test

2 Avg. of

Test 1

and

Test 2

ECC

302 Electronic

Devices 20 20 20 80 03 -- -- -- 100

Course Objectives:

1. To deliver the knowledge of basic semiconductor devices.

2. To enhance comprehension capabilities of students through understanding of electronic devices.

3. To introduce and motivate students to the use of advanced nano -electronic devices

4. To analyse amplifiers using BJT and FET based devices.

Course Outcomes:

After successful completion of the course students will be able to:

1. Explain the working of semiconductor devices.

2. Interpret the characteristics of semiconductor devices.

3. Analyse Electronics circuits using BJT and FET (DC & AC analysis)

4. Compare various biasing circuits & configurations of BJT and MOSFETs.

5. Select best circuit for the given specifications/application.

6. Describe the working of advanced nano -electronic devices

## Page 14

Programme Structure for Direct Second Year Admitted Students in (B.E.) – Electronics and Computer Science AY2021 -22 only

UNIVERSITY OF MUMBAI, B.E. (ELECTRONICS AND COMPUTER

SCIENCE), REV 2020 12

Module

No.

Unit

No.

Contents

Hrs.

1 P-N Junction Diode & Applications 06

1.1 Theoretical description of basic structure & construction, symbol, operation under zero

bias, forward bias & reverse bias, avalanche breakdown, V -I characteristics &

temperature effects (no mathematical analysis or numerical examples)

1.2 Application of P -N junction diode as clippers & clampers (different types of

configurations with input -output waveforms & transfer characteristics; theoretical

description & analysis of each circuit; numerical examples)

2 Special Semiconductor Devices 04

2.1 Zener diode as the voltage regulator (theoretical description only which includes

construction of circuit diagram, operation / working for varying DC input voltage &

varying load resistance, concept of line regulation & load regulation – no numerical

examples)

2.2 Construction, structure, symbol, operating principle, working & V -I characteristics

of special semiconductor devices such as Varactor diode, Schottky diode, Photo

diode, Light emitting diode (LED) & Solar cells

3 Bipolar Junction Transistor (BJT) 03

3.1 BJT construction & structure, symbol, operation, voltages & currents, V -I

characteristics of common emitter (CE), common base (CB) & common collector (CC)

configuration, Early effect & concept of leakage current

4 Field Effect Devices (FET) 03

4.1 JFET: Construction, symbol, operation, V -I & transfer characteristics

MOSFET: Construction, operation, symbol, V -I & transfer characteristics of the D -

MOSFET & E -MOSFET (theoretical description only for JFET & MOSFET)

5 Rectifiers &Filters 04

5.1 Rectifiers: Working & mathematical analysis of full – wave centre tapped rectifier

& bridge type rectifier (mathematical analysis include expressions for the DC /

average & RMS output voltage, DC / average & RMS output current & ripple factor;

numerical examples included)

5.2 Filters: Capacitor (C), Inductor (L), Inductor – Capacitor (LC), C -L-C (π) with

circuit diagram, waveforms, working / operation & expression for ripple factor

(theoretical description only – no analysis or numerical examples to be included)

Total 20

## Page 15

Programme Structure for Direct Second Year Admitted Students in (B.E.) – Electronics and Computer Science AY2021 -22 only

UNIVERSITY OF MUMBAI, B.E. (ELECTRONICS AND COMPUTER

SCIENCE), REV 2020 13

Text Books:

1. Donald A. Neamen, “Electronic Circuit Analysis and Design”, TATA McGraw Hill,

2nd Edition

2. Adel S. Sedra, Kenneth C. Smith and Arun N Chandorkar, “Microelectronic Circuits

Theory and Applications”, International Version, OXFORD International Students

Edition, Fifth Edition.

3. James Morris & Krzysztof Iniewski, Nano -electronic Device Applications Handbook by CRC Press

Reference Books:

1. Boylestead," Electronic Devices and Circuit Theory", Pearson Education

2. David A. Bell, “Electronic Devices and Circuits”, Oxford, Fifth Edition.

3. Muhammad H. Rashid, “Microelectronics Circuits Analysis and Design”, Cengage

4. S. Salivahanan, N. Suresh Kumar, “Electronic Devices and Circuits”, Tata McGraw

Hill.

5. Millman and Halkies, “Integrated El ectronics”, Tata McGraw Hill.

Internal Assessment (IA):

Two tests must be conducted which should cover at least 80% of syllabus. The average marks of both

the test will be considered as final IA marks.

End Semester Examination:

1. Question paper will com prise of 6 questions, each of 20 marks.

2. Total 4 questions need to be solved.

3. Question No.1 will be compulsory and based on the entire syllabus wherein sub questions of 2

to 5 marks will be asked.

4. Remaining questions will be selected from all the modules.

## Page 16

Programme Structure for Direct Second Year Admitted Students in (B.E.) – Electronics and Computer Science AY2021 -22 only

UNIVERSITY OF MUMBAI, B.E. (ELECTRONICS AND COMPUTER

SCIENCE), REV 2020 14

Course

Code

Course

Name Teaching Scheme Credits Assigned

Theory Practical

and oral Tutorial Theory Practical

and oral Tutorial Total

ECC 303 Digital

Electronics

03

--

--

03

--

--

03

Course

Code

Course

Name Examination Scheme

Theory Marks

Term

Work

Practical

and

Oral

Total Internal assessment

End

Sem.

Exam

Exam

duration

Hours

Test 1 Test

2 Avg. of

Test 1

and

Test 2

ECC 303 Digital

Electronics 20 20 20 80 03 -- -- 100

Course Pre-requisites:

Basic Electrical & Electronics Engineering

Course Objectives:

1. To understand various number systems & codes and to introduce students to various logic gates,

SOP, POS form and their minimization techniques.

2. To teach the working of combinational circuits, their applications and implementation of

combinational logic circuits using MSI chips.

3. To teach the elements of sequential logic design, analysis and design of sequential circuits.

4. To understand various counters and shift registers and its design using MSI chips.

5. To explain and describe various logic families and Programmable Logic Devices.

6. To train students in writing programs with Verilog hardware description languages.

Course Outcomes :

After successful completion of the course st udents will be able to

1. Perform code conversion and able to apply Boolean algebra for the implementation and minimisation of logic

functions.

2. Analyse, design and implement Combinational logic circuits.

3. Analyse, design and implement Sequential logic circuits .

4. Design and implement various counter using flip flops and MSI chips.

5. Understand TTL & CMOS logic families, PLDs, CPLD and FPGA.

6. Understand basics of Verilog Hardware Description Language and its programming with combinational and

sequential logic circuits.

## Page 17

Programme Structure for Direct Second Year Admitted Students in (B.E.) – Electronics and Computer Science AY2021 -22 only

UNIVERSITY OF MUMBAI, B.E. (ELECTRONICS AND COMPUTER

SCIENCE), REV 2020 15

Module

No. Unit No Contents Hrs.

1 Fundamentals of Digital Design 02

1.1 Number Systems and Codes: Review of Number System, Weighted code, Parity Code:

Hamming Code

Combinational Circuits using basic gates as well as MSI devices 02

2 2.1 Arithmetic Circuits: Ripple carry adder, Carry Look ahead adder

2.2 MSI devices: IC 7483, IC 74151, IC 74138, IC 7485.

Sequential Logic Design 07

3 3.1 Sequential Logic Design: Mealy and Moore Machines, Clocked synchronous state

machine analysis, State reduction techniques (inspection, partition and implication chart

method) and state assignment, sequence detector, Clocked synchronous state machine

design.

3.2 Sequential logic design practices: MSI counters (7490, 7492, 7493,74163, 74169) and

applications, MSI Shift registers (74194) and their applications.

Logic Families and Programmable Logic Devices 04

4 4.1 CMOS Logic : CMOS inverter, CMOS NAND and CMOS NOR, Interfacing CMOS to

TTL and TTL to CMOS.

4.2 Programmable Logic Devices : Concepts of PAL and PLA. Simple logic implementation

using PAL and PLA, Introduction to CPLD and FPGA architectures, Numericals based on

PLA and PAL

Introduction to Verilog HDL 05

5 5.1 Basics : Introduction to Hardware Description Language and its core features, synthesis in

digital design, logic value system, data types, constants, parameters, wires and registers.

Verilog Constructs: Continuous & procedural assignment statements, logical, arithmetic,

relational, shift o perator, always, if, case, loop statements, Gate level modelling, Module

instantiation statements.

5.2 Modelling Examples: Combinational logic eg. Arithmetic circuits, Multiplexer,

Demultiplexer, decoder, Sequential logic eg. flip flop, counters.

Total 20

## Page 18

Programme Structure for Direct Second Year Admitted Students in (B.E.) – Electronics and Computer Science AY2021 -22 only

UNIVERSITY OF MUMBAI, B.E. (ELECTRONICS AND COMPUTER

SCIENCE), REV 2020 16

Text Books:

1. R. P. Jain, Modern Digital Electronics, Tata McGraw Hill Education, Third Edition

2003.

2. Morris Mano, Digital Design, Pearson Education, Asia 2002.

3. J. Bhaskar, A Verilog HDL Primer, Third Edition, Star Galaxy Publishing,

2018.

Reference Books:

1. Digital Logic Applications and Design – John M. Yarbrough, Thomson

Publications, 2006

2. John F. Warkerly, Digital Design Principles and Practices, Pearson Education, Fourth Edition,

2008.

3. Stephen Brown and Zvonko Vranesic, Fundamentals of digital logic design with Verilog

design, McGraw Hill, 3rd Edition.

4. Digital Circuits and Logic Design – Samuel C. Lee, PHI

5. William I.Fletcher, “An Engineering Approach to Digital Design”, Prentice Hall of India.

6. Parag K Lala, “Digital System design using PLD”, BS Publications, 2003.

7. Charles H. Roth Jr., “Fundamentals of Logic design”, Thomson Learning, 2004.

Internal Assessment Test:

Assessment consists of two class tests of 20 marks each. The first -class test (Internal

Assessmen t I) is to be conducted when approx. 40% syllabus is completed and the second class

test (Internal Assessment II) when additional 40% syllabus is completed. Duration of each test

shall be one hour.

End Semester Theory Examination:

1. Question paper will comprise of total 06 questions, each carrying 20 marks.

2. Total 04 questions need to be solved.

3. Question No: 01 will be compulsory and based on the entire syllabus wherein 4 sub -questions

of 5 marks each will be asked.

4. Remaining questions will be randomly se lected from all the modules.

5. Weightage of each module will be proportional to the number of respective lecture hours as

mentioned in the syllabus.

## Page 19

Programme Structure for Direct Second Year Admitted Students in (B.E.) – Electronics and Computer Science AY2021 -22 only

UNIVERSITY OF MUMBAI, B.E. (ELECTRONICS AND COMPUTER

SCIENCE), REV 2020 17

Course

Code

Course Name

Teaching Scheme

Credits Assigned

Theory Practical Tutorial Theory Practical Tutorial Total

ECC 304 Data Structures

and Algorithms 03 -- -- 03 -- -- 03

Course

Code

Course Name Examination Scheme

Theory Marks

Term

Work

Practical and

Oral

Total Internal assessment End

Sem.

Exam Exam

duration

Hours Test 1 Test 2 Avg. of

Test 1 and

Test 2

ECC

304 Data

Structures

and

Algorithms 20 20 20 80 03 -- --

-- 100

Course Prerequisite:

C Programming

Course Objectives:

1. To understand and demonstrate basic data structures (such as Arrays, linked list, stack,

queue, binary tree, graph).

2. To implement various operations on data structures.

3. To study different sorting and searching techniques.

4. To choose efficient data structures and apply them to solve real world problems.

Course Outcomes:

After successful completion of the course students will be able to

1. Implement various linear data structures.

2. Implement various non -linear data structures.

3. Select appropriate sorting and searching techniques for a given problem and use it.

4. Develop solutions for real world problems by selecting appropriate data structure and

algorithms.

5. Analyse the complexity of the given algorithms.

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Module

No. Unit

No.

Contents

Hrs.

1 Introduction to Data Structures 02

Introduction to Data Structures, Types of Data Structures – Linear and Nonlinear,

Operations on Data Structures, Concept of array, Static arrays vs Dynamic Arrays,

structures.

2 Stack and Queues 04

Introduction, Basic Stack Operations, Representation of a Stack using Array,

Applications of Stack – Infix to Postfix Conversion and Postfix Evaluation.

Queue, Operations on Queue

3 Linked List 04

Introduction, Representation of Linked List, Linked List v/s Array, Types of Linked

List - Singly Linked List (SLL), Operations on Singly Linked List: Insertion, Deletion,

Print SLL.

Implementation of Stack and Queue using Singly Linked List.

4 Trees 04

Introduction, Tree Terminologies, Binary Tree, Representation of Binary Trees,

Binary Tree Traversals, Binary Search Tree Operations on Binary Search Tree,

5 Graphs 03

Introduction, Graph Terminologies, Representation of graph (Adjacency matrix and

adjacency list), Graph Traversals – Depth First Search (DFS) and Breadth First Search

(BFS)

6 Introduction to Sorting and Searching 03

Introduction to Searching: Linear search, Binary search,

Sorting: Internal VS. External Sorting, Sorting Techniques: Bubble, Insertion,

selection, Quick Sort, Merge Sort

Total 20

Text Books:

1. Data Structures Using C, Aaron M Tenenbaum, Yedidyah Langsam, Moshe J Augenstein,

Pearson Education

2. Introduction to Data Structure and its Applications Jean -Paul Tremblay, P. G.Sorenson

3. Data Structures using C, Reema Thareja, Oxford

4. C and Data structures, Prof. P.S.Deshpande, Prof. O.G.Ka kde, Dreamtech Press.

5. Data Structures: A Pseudocode Approach with C, Richard F. Gilberg & Behrouz A.

Forouzan, Second Edition, CENGAGE Learning

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Reference Books:

1. Data Structure Using C, Balagurusamy.

2. Data Structures using C and C++, Rajesh K Shukla, Wiley - India

3. ALGORITHMS Design and Analysis, Bhasin, OXFORD.

4. Data Structures Using C, ISRD Group, Second Edition, Tata McGraw -Hill.

5. Computer Algorithms by Ellis Horowitz and Sartaj Sahni, Universities Press.

6. Data Structures, Adapted by: GAV PAI, S chaum’s Outlines.

Internal Assessment (IA):

Two tests must be conducted which should cover at least 80% of syllabus. The average marks of both the tests

will be considered as the final IA marks.

End Semester Examination:

1. Question paper will consist of 6 questions, each of 20 marks.

2. Total 4 questions need to be solved.

3. Question No.1 will be compulsory and based on the entire syllabus wherein sub questions of 2 to 5 marks will

be asked.

4. Remaining questions will be selected from all the modules.

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SCIENCE), REV 2020 20

Course

Code

Course Name Teaching Scheme Credits Assigned

Theory Practical Tutorial Theory Practical Tutorial Total

ECC

305 Database

Management

Systems 03 -- -- 03 -- -- 03

Course

Code

Course Name Examination Scheme

Theory Marks

Term

Work

Practical and

Oral

Total Internal assessment

End

Sem.

Exam

Exam

duratio

n

Hours

Test 1

Test 2 Avg. of

Test 1

and

Test 2

ECC

305 Database

Management

Systems 20 20 20 80 03 -- -- 100

Course Objectives:

1. Develop entity relationship data model and its mapping to relational model

2. Learn relational algebra and formulate SQL queries

3. Apply normalization techniques to normalize the database

4. Understand concepts of transaction, concurrency control and recovery techniques

Course Outcomes:

After successful completion of the course students will be able to:

1. Recognize the need of database management system

2. Design ER and EER diagram for real life applications

3. Construct relational model and write relational algebra queries.

4. Form ulate SQL queries

5. Apply the concept of normalization to relational database design.

6. Describe the concepts of transaction, concurrency and recovery.

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SCIENCE), REV 2020 21

Module

No. Unit

No.

Contents

Hrs.

1 Introduction to Database Concepts 03

1.1 Introduction, Characteristics of databases

1.2 File systems v/s Database systems

1.3 Data abstraction and Data Independence

1.4 DBMS system architecture

1.5 Database Administrator

2 Entity –Relationship Data Model 03

2.1 The Entity -Relationship (ER) Model

2.2 Entity types: Weak and strong entity sets, Entity sets, Types of Attributes, Keys

2.3 Relationship constraints: Cardinality and Participation

3 Relational Model and Relational Algebra 03

3.1 Relational schema and concept of keys

3.2 Relational Algebra – operators, Relational Algebra Queries.

4 Structured Query Language (SQL) 05

4.1 Overview of SQL

4.2 Data Definition Commands

4.3 Integrity constraints: Key constraints, Domain Constraints, Referential integrity, Check

constraints

4.4 Data Manipulation commands, Data Control commands

4.5 Set and string operations, aggregate function - group by, having

5 Relational –Database Design 03

5.1 Concept of normalization

5.2 Function Dependencies

5.3 First Normal Form, 2NF, 3NF

6 Transactions Management and Concurrency and Recovery 03

6.1 Transaction Concept, Transaction states

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6.2 ACID properties

6.3 Transaction Control Commands

6.4 Serializability: Conflict and View

Total 20

Text Books:

1. Korth, Slberchatz,Sudarshan, Database System Concepts, 6th Edition, McGraw Hill

2. Elmasri and Navathe, Fundamentals of Database Systems, 5th Edition, Pearson education

3. Raghu Ramkrishnan and Johannes Gehrke, Database Management Systems, TMH

Reference Books:

1. Peter Rob and Carlos Coronel, Database Systems Design, Implementation and Management‖,

Thomson Learning, 5th Edition.

2. Dr. P.S. Deshpande, SQL and PL/SQL for Oracle 10g, Black Book, Dreamtech Press.

3. G. K. Gupta, Database Management Systems, McGraw Hill., 2012

Internal Assessment (IA):

Two tests must be conducted which should cover at least 80% of syllabus. The average marks of both the test will

be considered as final IA marks

End Semeste r Examination:

1. Question paper will comprise of 6 questions, each of 20 marks.

2. Total 4 questions need to be solved.

3. Question No.1 will be compulsory and based on the entire syllabus wherein sub questions of 2 to 5 marks

will be asked.

4. Remaining questions will be selected from all the modules .

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SCIENCE), REV 2020 23

Course

Code Course Name Teaching Scheme Credits Assigned

Theory Practical Tutorial Theory Practical Total

ECL 301 Electronic Devices Lab -- 02 -- -- 01 01

Course

Code

Course

Name Examination

Scheme

Theory Marks

Term

Work

Practical &

Oral

Total Internal assessment End

Sem.

Exam Exam

duration

Hours Test

1 Test

2 Avg. of Test 1

and Test 2

ECL 301 Electronic

Devices

Lab -- -- -- -- -- 25 25 50

Term Work:

At least 6 experiments covering entire syllabus of ECC 302 (Electronic Devices) should be set to have well

predefined inference and conclusion. This must include 60% Hardware and 40% Simulation

experiments. The experiments should be student centric and attempt should be made to make the

experiments meaningful and interesting. Experiments must be graded from time to time. The grades should

be converted into marks as per the Credit and Grading System manual and should be added and averaged.

The grading and term work assessment should be done based on this scheme. The final certification and

acceptance of term work ensures satisfactory performance of laboratory work and minimum passing marks

in term work. Practical and Oral exam will be based on the entire syllabus. Laboratory Objectives:

1. To deliver a hands -on approach for studying electronic devices

2. To comprehend characteristics of electronic devices; thereby understanding their behaviour

3. To analyse & calculate inherent parameters of electronic devices through experimental approach

4. To introduce modern software simulation tools for modelling & simulation of electronic devices

Laboratory Outcomes:

After successful completion of the laboratory students will be able to

1. Explain the working of semiconductor devices.

2. Interpret the characteris tics of semiconductor devices.

3. Analyse electronics circuits using BJT and FET (DC & AC analysis)

4. Simulate basic circuits using electronic devices through software simulation

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Suggested List of Experiments is given below. 70% of the experiments performed should be from

this list. For the rest 30%, the course instructor has the option to set innovative experiments, from

within the curriculum.

List of Hardware Experiments

Sr.

No. Experiment Name

1 To study passive (R, L, C) and active (BJT, MOSFET) components.

2 To study equipment (CRO, Function Generator, Power supply).

3 To perform characteristics of PN junction diode.

4 To perform Clippers and Clampers.

5 To perform Full wave/Bridge rectifier with LC/pi filter.

6 To perform Zener as a shunt voltage regulator.

7 To simulate VI characteristics of MEMRISTOR using nanohub.org

List of Simulation Experiments

Sr.

No. Experiment Name

1 SPICE simulation of and implementation for junction analysis

2 SPICE simulation of and implementation for BJT characteristics

3 SPICE simulation of and implementation for JFET characteristics

4 SPICE simulation of for MOSFET characteristics

5 SPICE simulation of Full wave/Bridge rectifier with LC/pi filter.

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SCIENCE), REV 2020 25

Course Code

Course Name Teaching Scheme Credits Assigned

Theory Practical Tutorial Theory Practical Total

ECL 302 Digital Electronics Lab -- 02 -- -- 01 01

Course

Code

Course

Name Examination Scheme

Theory Marks

Term

Work

Practical &

Oral

Total Internal assessment

End

Sem.

Exam

Exam

duration

Hours

Test 1

Test 2 Avg. of

Test 1

and

Test 2

ECL

302 Digital

Electronics

Lab - - - - - 25 25 50

Term Work:

At least 6 experiments covering the entire syllabus of ECC 303 (Digital Logic Circuits) should be set to

have well predefined inference and conclusion. The experiments should be student centric and attempt

should be made to make experiments meaningful and interesting. Simulation experiments are also

encouraged. Experiment must be graded from time to time. The grades should be converted into marks as

per the C redit and Grading System manual and should be added and averaged. The grading and term work

assessment should be done based on this scheme. The final certification and acceptance of term work

ensures satisfactory performance of laboratory work and minimum passing marks in term work. Practical

and Oral exam will be based on the entire syllabus.

Laboratory Objectives:

1. To learn the functionality of basic logic gates.

2. To construct combinational circuits and verify their functionalities.

3. To learn the functionality of flip flops and their conversion.

4. To design and implement synchronous and asynchronous counters, Shift registers using MSI

5. To simulate various combinational and sequential circuits and analyze the results using Verilog HDL.

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Suggested List of Experiments is given below. 70% of the experiments performed should be from

this list. For the rest 30%, the course instructor has th e option to set innovative experiments, from

within the curriculum.

List of Hardware Experiments

Sr.

No. Experiment Title

1 To verify different logic gates and implement basic gates using universal gates

2 To implement Boolean function in SOP and POS form

3 To implement half adder, full adder, half Subtractor, full Subtractor

4 To implement BCD adder using binary adder IC 7483

5 To implement logic equations using Multiplexer IC 74151

6 To verify truth table of SR, JK, T and D flip flops

7 To perform Flip flop conversion JK to D, JK to T and D to T flip flop

8 To implement MOD N counter using IC 7490/7492/7493

9 To implement Synchronous counter using IC 74163/74169 OR To implement universal

shift register using IC 74194

List of Simulation/Software Experiments

Sr.

No. Experiment Title

1 To design and simulate Full adder/full subtractor using Verilog HDL

2 To design and simulate Multiplexer/Demultiplexer using Verilog HDL

3 To design and simulate decoder 74138 using Verilog HDL

4 To simulate basic flip flops using Verilog HDL

5 To design and simulate 4 bit counter / up -down counter using Verilog HDL

6 To design and simulate Shift register using Verilog HDL

Additional/ Suggested experiments (optional) - Implementation of any of above using FPGA/CPLD

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Course

Code Course

Name Teaching Scheme Credits Assigned

Theory Practical Tutorial Theory Practical Total

ECL 303 Data Structures

and Algorithms

Lab -- 02 -- -- 01 01

Course

Code

Course

Name Examination

Scheme

Theory Marks

Term

Work Practical

& Oral

Total Internal assessment End

Sem.

Exam Exam

duration

Hours Test 1 Test 2 Avg. of

Test 1

and

Test 2

ECL 303 Data

Structures

and

Algorithms

Lab -- -- -- -- -- 25 25 50

Term Work:

At least 6 experiments and 2 assignments covering entire syllabus of Data Structures and Algorithms

(ECC 304) should be set to have well predefined inference and conclusion. The experiments sh ould be

student centric and attempt should be made to make experiments meaningful and interesting. Experiment

must be graded from time to time. The grades should be converted into marks as per the Credit and Grading

System manual and should be added and averaged. The grading and term work assessment should be done

based on this scheme. The final certification and acceptance of term work ensures satisfactory performance

of laboratory work and minimum passing marks in term work. Practical and Oral exam will be based on the

entire syllabus.

Total 25 Marks = (Experiments -15 mark + Attendance -5 mark + Assignments -05 mark) Prerequisite:

C Programming Language

Laboratory Outcomes:

1. Students will be able to implement linear data structures & will be able to handle operations like insertion,

deletion, searching and traversing on them.

2. Students will be able to implement nonlinear data structures & will be able to handle operations like insertion,

deletion, searching and traversing on them.

3. Students will be able to choose appropriate data structure and apply it in various problem domains.

4. Students will be able to select ap propriate searching techniques for given problems.

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Suggested List of Experiments

(*) marked experiments are compulsory.

Useful Links:

1. www.leetcode.com

2. www.hackerrank.com

3. www.cs.usfca.edu/~galles/visualization/Algorithms.html

4. www.codechef.com Sr.

No Experiment Name

1 *Implement Stack ADT using array

2 *Convert an Infix expression to Postfix expression using stack ADT

3 *Implement Linear Queue ADT using array

4 *Implement Singly Linked List ADT

5 *Implement Binary Search Tree ADT using Linked List

6 *Implement searching algorithms -Linear search, Binary search

7 *Implement sorting algorithms (any 2) - bubble, selection, insertion, merge,quick

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SCIENCE), REV 2020 29

Course

Code Course Name Teaching Scheme Credits Assigned

Theory Practical Tutorial Theory Practical Total

ECL 304 Database

Management

Systems lab -- 02 -- -- 01 -- 01

Course

Code

Course

Name Examination Scheme

Theory Marks

Term

Work

Practical

and

Oral

Total Internal assessment End

Sem.

Exam Exam

duration

Hours Test 1 Test 2 Avg, of Test 1

and Test 2

ECL 304 Database

Management

Systems lab -- -- -- -- -- 25 25 50

Term Work:

At least 6 experiments covering the entire syllabus of Database Management Systems (ECC 305) should

be set to have well predefined inference and conclusion. The experiments should be student centric and

attempt sh ould be made to make the experiments meaningful and interesting. Experiments must be graded

from time to time. The grades should be converted into marks as per the Credit and Grading System manual

and should be added and averaged. The grading and term work assessment should be done based on this

scheme. The final certification and acceptance of term work ensures satisfactory performance of laboratory

work and minimum passing marks in term work. Practical and Oral exam will be based on the entire

syllabus. Laboratory Outcomes:

At the end of the course the student should be able to

1. Design ER /EER diagram and convert to relational model for the realworld application.

2. Apply DDL, DML, DCL and TCL commands.

3. Write simple and complex queries

4. Use PL/SQL Constructs.

5. Demonstrate the concept of concurrent transactions execution and frontend -backend connectivity

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Suggested List of Experiments is given below. 70% of the experiments performed should be from

this list. For the rest 30%, the course instructor has the option to set innovative experiments, from

within the curriculum.

Sr. No. Experiment Name

1 Identify the case study and detailed statement of problem. Design an Entity -Relationship (ER)

2 Create a database using Data Definition Language (DDL) and apply integrity constraints for the

specified System

3 Apply DML Commands for the specified system

4 Perform Simple queries, string manipulation operations and aggregate functions.

5 Implement various Join operations.

6 Perform Nested and Complex queries

7 Perform DCL and TCL commands

8 Demonstrate Database connectivity

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Course

Code

Course Name Teaching Scheme

(Hrs.)

Credits Assigned

Theory Practical Tutorial Theory Practical Tutorial Total

ECL 305 Skill -based Lab

OOPM -- 02* + 02 -- -- 02 -- 02

* Theory class to be conducted for full class

Course

Code Course

Name Examination Scheme

Theory Marks Term

Work Practical

And

Oral

Total Internal assessment End

Sem.

Exam Exam.

Duration

(in Hrs)

Test 1 Test 2 Avg. of

Test 1

and

Test 2

ECL

305 Skill -based

Lab OOPM -- -- -- -- -- 50 -- 50

Course Pre -requisites:

• Fundamentals of C -Programming

• Control Structures

• Arrays and String

Course Objectives:

1. To understand Object Oriented Programming basics and its features.

2. To understand and apply Object Oriented Programming (OOP) principles

3. Able to implement Methods, Constructors, Arrays, Multithreading and Applet in java

4. Able to use a programming language to resolve problems.

Course Outcomes:

After successful completion of the course student will be able to

1. Use different control structures.

2. Understand fundamental features of an object -oriented language: object classes and interfaces,

exceptions and libraries of object collections.

3. Understand Java Programming.

4. To develop a program that efficiently implements the features and packaging concept of java in

laboratory.

5. To implement Exception Handling and Applets using Java.

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Module

No

Unit

No.

Contents

Hrs.

1 Introduction to Java 06

1.1 Programming paradigms - Introduction to programming paradigms, Introduction to four main

Programming paradigms like procedural, object oriented, functional, and logic & rule based.

Difference between C++ and Java.

1.2 Java History, Java Features, Java Virtual Machine, Data Types and Size (Signed vs. Unsigned,

User Defined vs. Primitive Data Types, Explicit Pointer type), Programming Language JDK

Environment and Tools.

2 Inheritance, Polymorphism, Encapsulation using Java 12

2.1 Classes and Methods : class fundamentals, declaring objects, assigning object reference

variables, adding methods to a class, returning a value, constructors, this keyword, garbage

collection, finalize () method, overloading methods, argument passing, object as parameter,

returning objects, access control, static, final, nested and inner classes, command line

arguments, variable -length Arguments.

String: String Class and Methods in Java.

2.2 Inheritances: Member access and inheritance, super class references, Using super,

multilevel hierarchy, constructor call sequence, method overriding, dynamic method

dispatch, abstract classes, Object class.

Packages and Interfaces: defining a package, finding packages and CLASSPATH, access

protection, importing packages, interfaces (defining, implementation, nesting, applying),

variables in interfaces, extending interfaces, instance of operator.

3 Exception Handling and Applets in Java 06

3.1 Exception Handling: fundamental, exception types, uncaught exceptions, try, catch, throw,

throws, finally, multiple catch clauses, nested try statements, built -in exceptions, custom

exceptions (creating your own exception subclasses).

3.2 Applet: Applet Fundamental, Applet Architecture, Applet Life Cycle, Applet Skeleton,

Requesting Repainting, status window, HTML Applet tag, passing parameters to Applets,

Applet and Application Program.

Total 24

Textbooks:

1. Bjarne Stroustrup, “The C++ Programming language”, Third edition, Pearson Education, 2000.

2. Deitel, “C++ How to Program”, 4th Edition, Pearson Education, 2005.

3. D. T. Editorial Services, “Java 8 Programming Black Book”, Dreamtech Press, Edition, 2015.

4. Yashwant Kanitkar, “Let Us Java”, BPB Publications, 4nd Edition, 2019.

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Reference Books:

1. Herbert Schidt, “The Complete Reference”, Tata McGraw -Hill Publishing Company Limited,

10th Edition, 2017.

2. Harvey M. Deitel, Paul J. Deitel, Java: How to Program, 8th Edition, PHI, 2009.

3. Grady Booch, James Rumbaugh, Ivar Jacobson, “The Unified Modeling Languageser Guide”,

Pearson Education.

4. Sachin Malhotra, Saurabh Chaudhary “Programming in Java”, Oxford University Press, 2010

Software Tools:

1. Raptor -Flowchart Simulati on:http://raptor.martincarlisle.com/

2. Eclipse: https://eclipse.org/

3. Netbeans:https://netbeans.org/downloads/

4. CodeBloc k:http://www.codeblocks.org/

5. J-Edit/J -Editor/Blue J

Online Repository:

1. Google Drive

2. GitHub

3. Code Guru

Suggested list of Experiments

Sr. No. JAVA Programs

1 Display addition of number

2 Accept marks from user, if Marks greater than 40, declare the student as “Pass” else “Fail””

3 Accept 3 numbers from user. Compare them and declare the largest number (Using if -else statement).

4 Display sum of first 10 even numbers using do -while loop.

5 Display Multiplication table of 15 using while loop.

6 Display basic calculator using Switch Statement.

7 Display the sum of elements of arrays.

8 Accept and display the string entered and execute at least 5 different string functions on it.

9 Read and display the numbers as command line Arguments and display the addition of them

10 Define a class, describe its constructor, overload the Constructors and instantiate its object.

11 Illustrate method of overloading

12 Demonstrate Parameterized Constructor

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13 Implement Multiple Inheritance using interface

14 Create thread by implementing 'runnable' interface or creating 'Thread Class.

15 Demonstrate Hello World Applet Example

Term Work:

At least 8 experiments covering entire syllabus should be set to have well predefined inference and conclusion.

Teacher should refer the suggested experiments and can design additional experiment to maintain better

understanding and quality.

The experiments should be students centric and attempt should be made to make experiments meaningful,

interesting and innovative. Term work assessment must be based on the overall performance of the student, with

experiments graded from time to time.

The grades will be converted to marks as per “ Choice Based Credit and Grading System ” manual and should

be added and averaged. Based on above scheme grading and te rm work assessment should be done.

The practical and oral examination will be based on the entire syllabus. Students are encouraged to share their

experiment codes on online repository. Practical exam slip should cover all 16 experiments for examination.

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics and Computer Science

(Rev. 2020)

Course code

Course Name

Credits

ECM 301 Mini Project 1 A 02

Course

Code

Course

Name Examination Scheme

Theory Marks Term

Work Practical/

Oral

Total

Internal Assessment End

Sem.

Exam Exam

duration

Hours

Test

1 Test

2 Avg. of

Test 1 and

Test 2

ECM

301 Mini

Project - 1A -- -- -- -- -- 25 25 50

Objectives

1. To acquaint with the process of identifying the needs and converting it into the problem.

2. To familiarize the process of solving the problem in a group.

3. To acquaint with the process of applying basic engineering fundamentals to attempt solutions to the problems.

4. To inculcate the process of self -learning and research.

Outcomes:

Learner will be able to…

1. Identify problems based on societal /research needs.

2. Apply Knowledge and skill to solve societal problems in a group.

3. Develop interpersonal skills to work as member of a group or leader.

4. Draw the proper inferences from available results through theoretical/ experimental/simulations.

5. Analyse the impact of sol utions in societal and environmental context for sustainable development.

6. Use standard norms of engineering practices

7. Excel in written and oral communication.

8. Demonstrate capabilities of self -learning in a group, which leads to life -long learning.

9. Demonstrate project management principles during project work.

Guidelines for Mini Project

Students shall form a group of 3 to 4 students, while forming a group shall not be allowed less than three or

more than four students, as it is a group activity.

Students should do survey and identify needs, which shall be converted into problem statement for mini

project in consultation with faculty supervisor/head of department/internal committee of faculties.

Students hall submit implementation plan in the form of Gantt/PERT/CPM chart, which will cover weekly

activity of mini project.

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics and Computer Science

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SCIENCE), REV 2020 36

A log book to be prepared by each group, wherein group can record weekly work progress, guide/supervisor

can verify and record notes/comments.

Faculty supervisor may give inputs to students during mini project activity; however, focus shall be on self -

learning.

Students in a group shall understand problem effectively, propose multiple solution and select best possible

solution in consultation with guide/ supervisor.

Students shall convert the best solution into working model using various components of their domain areas

and demonstrate.

The solution to be validated with proper justification and report to be compiled in standard format of

University of Mumbai.

With the focus on the self -learning, innovation, addressing societal prob lems and entrepreneurship quality

development within the students through the Mini Projects, it is preferable that a single project of appropriate

level and quality to be carried out in two semesters by all the groups of the students. i.e. Mini Project 1 i n

semester III and IV. Similarly, Mini Project 2 in semesters V and VI.

However, based on the individual students or group capability, with the mentor’s recommendations, if the

proposed Mini Project adhering to the qualitative aspects mentioned above gets completed in odd semester,

then that group can be allowed to work on the extension of the Mini Project with suitable

improvements/modifications or a completely new project idea in even semester. This policy can be adopted

on case by case basis.

Students must take up a project spanning Semester 3 and Semester 4. It is expected that in Semester 3,

Literature Survey and Problem formulation is completed and a concise report of the same is submitted.

In Semester 4, Implementation of the project followed by report is expected.

Guidelines for Assessment of Mini Project:

Term Work

The review/ progress monitoring committee shall be constituted by head of departments of each

institute. The progress of mini project to be evaluated on continuous basis, minimum two reviews in

each semester.

In continuous assessment focus shall also be on each individual student, assessment based on

individual’s contribution in group activity, their understanding and response to questions.

Distribution of Term work marks for both semesters shall be as below;

o Marks awarded by guide/supervisor based on log book : 10

o Marks awarded by review committee 10

o Quality of Project report 05

Review/progress monitoring committee may consider following points for assessment based on either

one y ear or half year project as mentioned in general guidelines.

One-year project:

In first semester entire theoretical solution shall be ready, including components/system selection and

cost analysis. Two reviews will be conducted based on presentation given by students group.

First shall be for finalisation of problem

Second shall be on finalisation of proposed solution of problem.

In second semester expected work shall be procurement of component’s/systems, building of working

prototype, testing and validation of results based on work completed in an earlier semester.

First review is based on readiness of building working prototype to be conducted.

Second review shall be based on poster presentation cum demonstration of working model in

last month of the said semester.

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Programme Structure for Bachelor of Engineering (B.E.) – Electronics and Computer Science

(Rev. 2020)

UNIVERSITY OF MUMBAI, B.E. (ELECTRONICS AND COMPUTER

SCIENCE), REV 2020 37

Half -year project:

In this case in one semester students’ group shall complete project in all aspects including,

o Identification of need/problem

o Proposed final solution

o Procurement of components/systems

o Building prototype and testing

Two reviews will be conducted for contin uous assessment,

First shall be for finalisation of problem and proposed solution

Second shall be for implementation and testing of solution.

Assessment criteria of Mini Project.

Mini Project shall be assessed based on following criteria;

1. Quality of survey/ need identification

2. Clarity of Problem definition based on need.

3. Innovativeness in solutions

4. Feasibility of proposed problem solutions and selection of best solution

5. Cost effectiveness

6. Societal impact

7. Innovativeness

8. Cost effectiveness and Societal impact

9. Full functioning of working model as per stated requirements

10. Effective use of skill sets

11. Effective use of standard engineering norms

12. Contribution of an individual’s as member or leader

13. Clarity in written and oral communication

In one year, project , first semester evaluation may be based on first six criteria’s and remaining may

be used for second semester evaluation of performance of students in mini project.

In case of half year project all criteria’s in generic may be considered for evaluation of performance

of students in mini project.

Guidelines for Assessment of Mini Project Practical/Oral Examination:

Report should be prepared as per the guidelines issued by the University of Mumbai.

Mini Project shall be assessed through a presentation and demonstration of working model by the student

project group to a panel of Internal and External Examiners preferably from industry or research organisations

having experience of more than five years approved by head of Institution.

Students shall be motiva ted to publish a paper based on the work in Conferences/students competitions.

Mini Project shall be assessed based on following points;

1. Quality of problem and Clarity

2. Innovativeness in solutions

3. Cost effectiveness and Societal impact

4. Full functioning of working model as per stated requirements

5. Effective use of skill sets

6. Effective use of standard engineering norms

7. Contribution of an individual’s as member or leader

8. Clarity in written and oral communication